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Dynamic Power and Performance Back-Annotation for Fast and Accurate Functional Hardware Simulation
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What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-13074-8_18openalex-snapshot
ML for System-Level Modeling
inferred← citeshttps://doi.org/10.1007/978-3-031-13074-8_4openalex-snapshot
Deep Learning for Power and Switching Activity Estimation
inferred← citeshttps://doi.org/10.1007/978-981-10-4436-6_1openalex-snapshot
Virtual Prototyping of Embedded Systems: Speed and Accuracy Tradeoffs
inferred← citeshttps://doi.org/10.1016/j.vlsi.2025.102513openalex-snapshot
A systematic review of machine learning-driven design space exploration in high-level synthesis
inferred← citeshttps://doi.org/10.1109/access.2021.3067453openalex-snapshot
High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs
inferred← citeshttps://doi.org/10.1109/fpl68686.2025.00030openalex-snapshot
ATAPP: Architecture and Technology Aware Power Predictor for Unseen FPGAS
inferred← citeshttps://doi.org/10.1109/iccad.2015.7372659openalex-snapshot
Learning-based power modeling of system-level black-box IPs
inferred← citeshttps://doi.org/10.1109/iseda62518.2024.10617476openalex-snapshot
CAPEDL: Cycle-Accurate Power Estimation with Deep Learning
inferred← citeshttps://doi.org/10.1109/isvlsi.2017.15openalex-snapshot
SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level
inferred← citeshttps://doi.org/10.1109/les.2019.2935052openalex-snapshot
An Accurate and Quick ANN-Based System-Level Dynamic Power Estimation Model Using LLVM IR Profiling for FPGA Designs
inferred← citeshttps://doi.org/10.1145/3177865openalex-snapshot
Learning-Based, Fine-Grain Power Modeling of System-Level Hardware IPs
inferred← citeshttps://doi.org/10.1145/3607888openalex-snapshot
Proceedings of the 2023 International Conference on Hardware/Software Codesign and System Synthesis
inferred← citeshttps://doi.org/10.1145/3607888.3608962openalex-snapshot
Special Session: Machine Learning for Embedded System Design
inferred← citeshttps://doi.org/10.15598/aeee.v16i3.2947openalex-snapshot
System-Level Leakage Power Estimation Model for ASIC Designs
inferred← citeshttps://doi.org/10.15598/aeee.v20i1.4229openalex-snapshot
Early Area and Power Estimation Model for Rapid System Level Design and Design Space Exploration
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774589openalex-snapshot
DeepPM: Transformer-based Power and Performance Prediction for Energy-Aware Software
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774682openalex-snapshot
PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
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