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Proceedings of the 2023 International Conference on Hardware/Software Codesign and System Synthesis
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Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/pssa.202300019openalex-snapshot
Insights into the Temperature‐Dependent Switching Behavior of Three‐Gated Reconfigurable Field‐Effect Transistors
inferredcites →https://doi.org/10.1007/11605805_1openalex-snapshot
Cache Attacks and Countermeasures: The Case of AES
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Threshold Implementations Against Side-Channel Attacks and Glitches
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Towards Sound Approaches to Counteract Power-Analysis Attacks
inferredcites →https://doi.org/10.1007/3-540-68697-5_9openalex-snapshot
Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
inferredcites →https://doi.org/10.1007/978-1-4419-5906-5_196openalex-snapshot
Differential Power Analysis
inferredcites →https://doi.org/10.1007/978-3-030-27562-4_10openalex-snapshot
Platform-Agnostic Learning-Based Scheduling
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Neural Predictor for Neural Architecture Search
inferredcites →https://doi.org/10.1007/978-3-030-64837-4_26openalex-snapshot
SILVER – Statistical Independence and Leakage Verification
inferredcites →https://doi.org/10.1007/978-3-031-04580-6_13openalex-snapshot
Phase-Aware CPU Workload Forecasting
inferredcites →https://doi.org/10.1007/978-3-031-13074-8openalex-snapshot
Machine Learning Applications in Electronic Design Automation
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Machine Learning for Agile FPGA Design
inferredcites →https://doi.org/10.1007/978-3-319-09228-7openalex-snapshot
ICT Innovations for Sustainability
inferredcites →https://doi.org/10.1007/978-3-319-40667-1_14openalex-snapshot
Flush+Flush: A Fast and Stealthy Cache Attack
inferredcites →https://doi.org/10.1007/978-3-319-47474-8_1openalex-snapshot
The Notion of Self-aware Computing
inferredcites →https://doi.org/10.1007/978-3-540-45146-4_27openalex-snapshot
Private Circuits: Securing Hardware against Probing Attacks
inferredcites →https://doi.org/10.1007/978-3-540-69850-0_8openalex-snapshot
Fifteen Years of Formal Property Verification in Intel
inferredcites →https://doi.org/10.1007/978-981-16-7487-7_7openalex-snapshot
A Modern Primer on Processing in Memory
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LACross: Learning-Based Analytical Cross-Platform Performance and Power Prediction
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Three pillars of sustainability: in search of conceptual origins
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AI-enabled privacy-preservation phrase with multi-keyword ranked searching for sustainable edge-cloud networks in the era of industrial IoT
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The immersion cooling technology: Current and future development in energy saving
inferredcites →https://doi.org/10.1016/j.enbuild.2023.112874openalex-snapshot
A comprehensive analysis of green building rating systems for data centers
inferredcites →https://doi.org/10.1016/j.energy.2011.04.048openalex-snapshot
Optimal waste heat recovery and reuse in industrial zones
inferredcites →https://doi.org/10.1016/j.jclepro.2021.128966openalex-snapshot
Assessing the embodied carbon footprint of IoT edge devices with a bottom-up life-cycle approach
inferredcites →https://doi.org/10.1016/j.jnca.2020.102781openalex-snapshot
A survey on computation offloading modeling for edge computing
inferredcites →https://doi.org/10.1016/j.micpro.2022.104671openalex-snapshot
Early RTL delay prediction using neural networks
inferredcites →https://doi.org/10.1016/j.rser.2017.10.058openalex-snapshot
Future views on waste heat utilization – Case of data centers in Northern Europe
inferredcites →https://doi.org/10.1016/j.sse.2021.108036openalex-snapshot
20 Years of reconfigurable field-effect transistors: From concepts to future applications
inferredcites →https://doi.org/10.1016/j.sse.2022.108381openalex-snapshot
Reconfigurable field effect transistors: A technology enablers perspective
inferredcites →https://doi.org/10.1016/j.sysarc.2022.102561openalex-snapshot
A survey on hardware accelerators: Taxonomy, trends, challenges, and perspectives
inferredcites →https://doi.org/10.1021/nl203094hopenalex-snapshot
Reconfigurable Silicon Nanowire Transistors
inferredcites →https://doi.org/10.1021/nl401826uopenalex-snapshot
Dually Active Silicon Nanowire Transistors and Circuits with Equal Electron and Hole Transport
inferredcites →https://doi.org/10.1038/s41928-020-00511-7openalex-snapshot
Two-dimensional transistors with reconfigurable polarities for secure circuits
inferredcites →https://doi.org/10.1038/sdata.2016.18openalex-snapshot
The FAIR Guiding Principles for scientific data management and stewardship
inferredcites →https://doi.org/10.1109/access.2019.2944420openalex-snapshot
Load Balancing and Server Consolidation in Cloud Computing Environments: A Meta-Study
inferredcites →https://doi.org/10.1109/access.2020.2991734openalex-snapshot
An Overview on Edge Computing Research
inferredcites →https://doi.org/10.1109/access.2020.3001352openalex-snapshot
Quantitative Characterization of Reconfigurable Transistor Logic Gates
inferredcites →https://doi.org/10.1109/asp-dac52403.2022.9712530openalex-snapshot
SONIC: A Sparse Neural Network Inference Accelerator with Silicon Photonics for Energy-Efficient Deep Learning
inferredcites →https://doi.org/10.1109/aspdac.2012.6164947openalex-snapshot
Abstract system-level models for early performance and power exploration
inferredcites →https://doi.org/10.1109/cahpc.2018.8645918openalex-snapshot
Online Detection of Spectre Attacks Using Microarchitectural Traces from Performance Counters
inferredcites →https://doi.org/10.1109/ccgrid57682.2023.00020openalex-snapshot
An experimental comparison of software-based power meters: focus on CPU and GPU
inferredcites →https://doi.org/10.1109/codesisss.2015.7331366openalex-snapshot
LearnLoc: A framework for smart indoor localization with embedded mobile devices
inferredcites →https://doi.org/10.1109/cvpr46437.2021.00439openalex-snapshot
ReNAS: Relativistic Evaluation of Neural Architecture Search
inferredcites →https://doi.org/10.1109/cvpr52688.2022.01553openalex-snapshot
Masked Autoencoders Are Scalable Vision Learners
inferredcites →https://doi.org/10.1109/dac18072.2020.9218643openalex-snapshot
GRANNITE: Graph Neural Network Inference for Transferable Power Estimation
inferredcites →https://doi.org/10.1109/dac18074.2021.9586161openalex-snapshot
CrossLight: A Cross-Layer Optimized Silicon Photonic Neural Network Accelerator
inferredcites →https://doi.org/10.1109/dac56929.2023.10247917openalex-snapshot
R-TOSS: A Framework for Real-Time Object Detection using Semi-Structured Pruning
inferredcites →https://doi.org/10.1109/ecctd49232.2020.9218418openalex-snapshot
On the Development of MCU-based ad hoc HW Interface Circuitry for Memristor Characterization
inferredcites →https://doi.org/10.1109/fccm.2018.00029openalex-snapshot
Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning
inferredcites →https://doi.org/10.1109/fccm.2019.00059openalex-snapshot
Model-Extraction Attack Against FPGA-DNN Accelerator Utilizing Correlation Electromagnetic Analysis
inferredcites →https://doi.org/10.1109/fpl.2010.69openalex-snapshot
PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems
inferredcites →https://doi.org/10.1109/fpl.2018.00054openalex-snapshot
Multi-fidelity Optimization for High-Level Synthesis Directives
inferredcites →https://doi.org/10.1109/fpl.2019.00069openalex-snapshot
Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design
inferredcites →https://doi.org/10.1109/hldvt.2016.7748254openalex-snapshot
Design centric modeling of digital hardware
inferredcites →https://doi.org/10.1109/host49136.2021.9702278openalex-snapshot
Automated Detection of Spectre and Meltdown Attacks Using Explainable Machine Learning
inferredcites →https://doi.org/10.1109/hpca.2015.7056063openalex-snapshot
GPGPU performance and power estimation using machine learning
inferredcites →https://doi.org/10.1109/hst.2017.7951799openalex-snapshot
High efficiency power side-channel attack immunity using noise injection in attenuated signature domain
inferredcites →https://doi.org/10.1109/icarm.2017.8273224openalex-snapshot
Gait trajectory prediction for lower-limb exoskeleton based on Deep Spatial-Temporal Model (DSTM)
inferredcites →https://doi.org/10.1109/iccad.2015.7372659openalex-snapshot
Learning-based power modeling of system-level black-box IPs
inferredcites →https://doi.org/10.1109/iccad.2017.8203809openalex-snapshot
COMBA: A comprehensive model-based analysis framework for high level synthesis of real applications
inferredcites →https://doi.org/10.1109/iccrd54409.2022.9730377openalex-snapshot
A Survey on Convolutional Neural Network Accelerators: GPU, FPGA and ASIC
inferredcites →https://doi.org/10.1109/iedm19574.2021.9720631openalex-snapshot
On the Channel Percolation in Ferroelectric FET Towards Proper Analog States Engineering
inferredcites →https://doi.org/10.1109/iedm45625.2022.10019400openalex-snapshot
Compact Ferroelectric Programmable Majority Gate for Compute-in-Memory Applications
inferredcites →https://doi.org/10.1109/ieeestd.2012.6134619openalex-snapshot
IEEE Standard for Standard SystemC Language Reference Manual
inferredcites →https://doi.org/10.1109/iiswc.2007.4362178openalex-snapshot
Predicting Program Behavior Based On Objective Function Minimization
inferredcites →https://doi.org/10.1109/iscas45731.2020.9180671openalex-snapshot
An FPGA Based System for Interfacing with Crossbar Arrays
inferredcites →https://doi.org/10.1109/isscc.2017.7870301openalex-snapshot
8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator
inferredcites →https://doi.org/10.1109/isvlsi.2018.00143openalex-snapshot
Predictive Modeling for CPU, GPU, and FPGA Performance and Power Consumption: A Survey
inferredcites →https://doi.org/10.1109/isvlsi54635.2022.00030openalex-snapshot
RecLight: A Recurrent Neural Network Accelerator with Integrated Silicon Photonics
inferredcites →https://doi.org/10.1109/itc50571.2021.00020openalex-snapshot
Brain-Inspired Computing for Wafer Map Defect Pattern Classification
inferredcites →https://doi.org/10.1109/jproc.2019.2918437openalex-snapshot
Edge Computing Security: State of the Art and Challenges
inferredcites →https://doi.org/10.1109/les.2022.3144010openalex-snapshot
Reconfigurable Field Effect Transistors Design Solutions for Delay-Invariant Logic Gates
inferredcites →https://doi.org/10.1109/mce.2018.2828440openalex-snapshot
Advanced Driver-Assistance Systems: A Path Toward Autonomous Vehicles
inferredcites →https://doi.org/10.1109/mdat.2017.2757143openalex-snapshot
Self-Awareness in Systems on Chip— A Survey
inferredcites →https://doi.org/10.1109/mdat.2020.2982628openalex-snapshot
A Survey of Silicon Photonics for Energy-Efficient Manycore Computing
inferredcites →https://doi.org/10.1109/mdat.2020.3012087openalex-snapshot
The Role of Competence Networks in the Era of Cyber-Physical Systems — Promoting Knowledge Sharing and Knowledge Exchange
inferredcites →https://doi.org/10.1109/mdat.2021.3102013openalex-snapshot
A Survey of Neuromorphic Computing-in-Memory: Architectures, Simulators, and Security
inferredcites →https://doi.org/10.1109/mdat.2022.3143427openalex-snapshot
Machine Learning and Algorithms: Let Us Team Up for EDA
inferredcites →https://doi.org/10.1109/mlcad48534.2019.9142100openalex-snapshot
Learning-Based CPU Power Modeling
inferredcites →https://doi.org/10.1109/mlcad52597.2021.9531161openalex-snapshot
Learning-Based Workload Phase Classification and Prediction Using Performance Monitoring Counters
inferredcites →https://doi.org/10.1109/mlcad55463.2022.9900097openalex-snapshot
Industrial Experience with Open-Source EDA Tools
inferredcites →https://doi.org/10.1109/mocast52088.2021.9493362openalex-snapshot
Design Steps towards a MCU-based Instrumentation System for Memristor-based Crossbar Arrays
inferredcites →https://doi.org/10.1109/newcas57931.2023.10198196openalex-snapshot
Formal Analysis of Camouflaged Reconfigurable Circuits
inferredcites →https://doi.org/10.1109/norcas53631.2021.9599868openalex-snapshot
RTL Delay Prediction Using Neural Networks
inferredcites →https://doi.org/10.1109/risp.1992.213271openalex-snapshot
Lattice scheduling and covert channels
inferredcites →https://doi.org/10.1109/samos.2016.7818338openalex-snapshot
Genesys: Automatically generating representative training sets for predictive benchmarking
inferredcites →https://doi.org/10.1109/socc52499.2021.9739485openalex-snapshot
Can We Trust Machine Learning for Electronic Design Automation?
inferredcites →https://doi.org/10.1109/sp.2019.00002openalex-snapshot
Spectre Attacks: Exploiting Speculative Execution
inferredcites →https://doi.org/10.1109/tc.2020.3022979openalex-snapshot
Hardware Private Circuits: From Trivial Composition to Full Verification
inferredcites →https://doi.org/10.1109/tc.2021.3066899openalex-snapshot
On the Reliability of FeFET On-Chip Memory
inferredcites →https://doi.org/10.1109/tc.2022.3151857openalex-snapshot
Brain-Inspired Computing for Circuit Reliability Characterization
inferredcites →https://doi.org/10.1109/tc.2022.3185572openalex-snapshot
Machine Learning-Based Microarchitecture- Level Power Modeling of CPUs
inferredcites →https://doi.org/10.1109/tcad.2009.2026356openalex-snapshot
Electronic System-Level Synthesis Methodologies
inferredcites →https://doi.org/10.1109/tcad.2011.2110592openalex-snapshot
High-Level Synthesis for FPGAs: From Prototyping to Deployment
inferredcites →https://doi.org/10.1109/tcad.2016.2578882openalex-snapshot
Source-Level Performance, Energy, Reliability, Power and Thermal (PERPT) Simulation
inferredcites →https://doi.org/10.1109/tcad.2018.2834398openalex-snapshot
Hardware-Assisted Cross-Generation Prediction of GPUs Under Design
inferredcites →https://doi.org/10.1109/tcad.2020.3012749openalex-snapshot
INDRA: Intrusion Detection Using Recurrent Autoencoders in Automotive Embedded Systems
inferredcites →https://doi.org/10.1109/tcad.2021.3070243openalex-snapshot
Imitating Functional Operations for Mitigating Side-Channel Leakage
inferredcites →https://doi.org/10.1109/tcad.2021.3124762openalex-snapshot
MLCAD: A Survey of Research in Machine Learning for CAD Keynote Paper
inferredcites →https://doi.org/10.1109/tcad.2022.3197698openalex-snapshot
NeuroMap: Efficient Task Mapping of Deep Neural Networks for Dynamic Thermal Management in High-Bandwidth Memory
inferredcites →https://doi.org/10.1109/tcsi.2023.3289325openalex-snapshot
Modeling and Predicting Transistor Aging Under Workload Dependency Using Machine Learning
inferredcites →https://doi.org/10.1109/tcsii.2014.2357292openalex-snapshot
MAGIC—Memristor-Aided Logic
inferredcites →https://doi.org/10.1109/tcsii.2023.3275983openalex-snapshot
Design of Energy-Efficient RFET-Based Exact and Approximate 4:2 Compressors and Multipliers
inferredcites →https://doi.org/10.1109/ted.2014.2359112openalex-snapshot
Polarity-Controllable Silicon Nanowire Transistors With Dual Threshold Voltages
inferredcites →https://doi.org/10.1109/tetc.2016.2585043openalex-snapshot
An Automated Test Equipment for Characterization of Emerging MRAM and RRAM Arrays
inferredcites →https://doi.org/10.1109/tetc.2023.3257684openalex-snapshot
Side-Channel Attack Analysis on In-Memory Computing Architectures
inferredcites →https://doi.org/10.1109/tifs.2020.2971153openalex-snapshot
Trivially and Efficiently Composing Masked Gadgets With Probe Isolating Non-Interference
inferredcites →https://doi.org/10.1109/tmscs.2018.2870438openalex-snapshot
Dynamic Energy Optimization in Chip Multiprocessors Using Deep Neural Networks
inferredcites →https://doi.org/10.1109/tnsre.2019.2950309openalex-snapshot
Gait Trajectory and Event Prediction from State Estimation for Exoskeletons During Gait
inferredcites →https://doi.org/10.1109/tpds.2018.2833876openalex-snapshot
BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures
inferredcites →https://doi.org/10.1109/tpds.2020.3013948openalex-snapshot
Rusty: Runtime Interference-Aware Predictive Monitoring for Modern Multi-Tenant Systems
inferredcites →https://doi.org/10.1109/tra.2004.825515openalex-snapshot
Automatic Gait-Pattern Adaptation Algorithms for Rehabilitation With a 4-DOF Robotic Orthosis
inferredcites →https://doi.org/10.1109/trustcom50675.2020.00123openalex-snapshot
Cache side-channel attacks detection based on machine learning
inferredcites →https://doi.org/10.1109/tsusc.2020.2983571openalex-snapshot
ECOGreen: Electricity Cost Optimization for Green Datacenters in Emerging Power Markets
inferredcites →https://doi.org/10.1109/tvlsi.2018.2805470openalex-snapshot
Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM
inferredcites →https://doi.org/10.1109/tvlsi.2018.2884646openalex-snapshot
Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors
inferredcites →https://doi.org/10.1109/vlsi-soc.2018.8644747openalex-snapshot
Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors
inferredcites →https://doi.org/10.1109/vlsi-soc54400.2022.9939622openalex-snapshot
Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection
inferredcites →https://doi.org/10.1109/vlsi-soc54400.2022.9939636openalex-snapshot
An Energy-Efficient Three-Independent-Gate FET Cell Library for Low-Power Edge Computing
inferredcites →https://doi.org/10.1109/vts50974.2021.9441038openalex-snapshot
On the Reliability of In-Memory Computing: Impact of Temperature on Ferroelectric TCAM
inferredcites →https://doi.org/10.1145/1143844.1143980openalex-snapshot
Active learning via transductive experimental design
inferredcites →https://doi.org/10.1145/2000064.2000108openalex-snapshot
Dark silicon and the end of multicore scaling
inferredcites →https://doi.org/10.1145/2086696.2086699openalex-snapshot
An architecture-independent instruction shuffler to protect against side-channel attacks
inferredcites →https://doi.org/10.1145/2209291.2209302openalex-snapshot
Divide and conquer high-level synthesis design space exploration
inferredcites →https://doi.org/10.1145/2463209.2488795openalex-snapshot
On learning-based methods for design-space exploration with high-level synthesis
inferredcites →https://doi.org/10.1145/2742060.2742078openalex-snapshot
Reinforcement Learning for Thermal-aware Many-core Task Allocation
inferredcites →https://doi.org/10.1145/2830772.2830780openalex-snapshot
Cross-architecture performance prediction (XAPP) using CPU code to predict GPU performance
inferredcites →https://doi.org/10.1145/2976749.2978427openalex-snapshot
Strong Non-Interference and Type-Directed Higher-Order Masking
inferredcites →https://doi.org/10.1145/3177865openalex-snapshot
Learning-Based, Fine-Grain Power Modeling of System-Level Hardware IPs
inferredcites →https://doi.org/10.1145/3380446.3430636openalex-snapshot
Transfer Learning for Design-Space Exploration with High-Level Synthesis
inferredcites →https://doi.org/10.1145/3386263.3407586openalex-snapshot
Comprehensive Evaluation of Machine Learning Countermeasures for Detecting Microarchitectural Side-Channel Attacks
inferredcites →https://doi.org/10.1145/3386263.3407652openalex-snapshot
Energy-Efficient Hardware for Language Guided Reinforcement Learning
inferredcites →https://doi.org/10.1145/3400302.3415657openalex-snapshot
Accurate operation delay prediction for FPGA HLS using graph neural networks
inferredcites →https://doi.org/10.1145/3403584openalex-snapshot
Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs
inferredcites →https://doi.org/10.1145/3419468openalex-snapshot
Leakage-Aware Dynamic Thermal Management of 3D Memories
inferredcites →https://doi.org/10.1145/3451179openalex-snapshot
Machine Learning for Electronic Design Automation: A Survey
inferredcites →https://doi.org/10.1145/3459009openalex-snapshot
A Survey on Silicon Photonics for Deep Learning
inferredcites →https://doi.org/10.1145/3466752.3480064openalex-snapshot
APOLLO: An Automated Power Modeling Framework for Runtime Power Introspection in High-Volume Commercial Microprocessors
inferredcites →https://doi.org/10.1145/3469660openalex-snapshot
Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects
inferredcites →https://doi.org/10.1145/3476988openalex-snapshot
ROBIN: A Robust Optical Binary Neural Network Accelerator
inferredcites →https://doi.org/10.1145/3489517.3530409openalex-snapshot
Automated accelerator optimization aided by graph neural networks
inferredcites →https://doi.org/10.1145/3503540openalex-snapshot
Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design
inferredcites →https://doi.org/10.1145/3508352.3561095openalex-snapshot
Applying GNNs to Timing Estimation at RTL
inferredcites →https://doi.org/10.1145/3508352.3561116openalex-snapshot
Securing Hardware through Reconfigurable Nano-Structures
inferredcites →https://doi.org/10.1145/3526241.3530364openalex-snapshot
A Silicon Photonic Accelerator for Convolutional Neural Networks with Heterogeneous Quantization
inferredcites →https://doi.org/10.1145/3530775openalex-snapshot
FPGA HLS Today: Successes, Challenges, and Opportunities
inferredcites →https://doi.org/10.1145/3532185openalex-snapshot
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems
inferredcites →https://doi.org/10.1145/3543853openalex-snapshot
A Comprehensive Survey on Electronic Design Automation and Graph Neural Networks: Theory and Applications
inferredcites →https://doi.org/10.1145/3548606.3559362openalex-snapshot
Low-Latency Hardware Private Circuits
inferredcites →https://doi.org/10.1145/3564929openalex-snapshot
Learning-based Phase-aware Multi-core CPU Workload Forecasting
inferredcites →https://doi.org/10.1145/3570925openalex-snapshot
Graph Neural Networks for High-Level Synthesis Design Space Exploration
inferredcites →https://doi.org/10.1145/3583781.3590259openalex-snapshot
TRON: Transformer Neural Network Acceleration with Non-Coherent Silicon Photonics
inferredcites →https://doi.org/10.1609/aaai.v31i1.10804openalex-snapshot
SeqGAN: Sequence Generative Adversarial Nets with Policy Gradient
inferredcites →https://doi.org/10.2307/2288890openalex-snapshot
Empirical Model-Building and Response Surfaces.
inferredcites →https://doi.org/10.23919/date.2017.7927269openalex-snapshot
Sampling-based binary-level cross-platform performance estimation
inferredcites →https://doi.org/10.23919/date.2019.8714724openalex-snapshot
Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis
inferredcites →https://doi.org/10.23919/date48585.2020.9116201openalex-snapshot
Silicon Photonic Microring Resonators: Design Optimization Under Fabrication Non-Uniformity
inferredcites →https://doi.org/10.23919/date48585.2020.9116554openalex-snapshot
A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks
inferredcites →https://doi.org/10.23919/date51398.2021.9474028openalex-snapshot
Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors
inferredcites →https://doi.org/10.23919/date54114.2022.9774620openalex-snapshot
Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach
inferredcites →https://doi.org/10.23919/date54114.2022.9774750openalex-snapshot
CR-Spectre: Defense-Aware ROP Injected Code-Reuse Based Dynamic Spectre
inferredcites →https://doi.org/10.3389/felec.2022.833260openalex-snapshot
All-in-Memory Brain-Inspired Computing Using FeFET Synapses
inferredcites →https://doi.org/10.3389/fnbot.2020.00058openalex-snapshot
Gait Neural Network for Human-Exoskeleton Interaction
inferredcites →https://doi.org/10.3390/app11156790openalex-snapshot
Physical Side-Channel Attacks on Embedded Neural Networks: A Survey
inferredcites →https://doi.org/10.3850/9783981537079_0992openalex-snapshot
Leverage Emerging Technologies For DPA-Resilient Block Cipher Design
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Exploiting Generative AI to Scale up Intelligent Tutoring Systems
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Composable Masking Schemes in the Presence of Physical Defaults & the Robust Probing Model
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Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography
inferredcites →https://doi.org/10.46586/tches.v2022.i1.506-556openalex-snapshot
ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking
inferredcites →https://doi.org/10.46586/tches.v2022.i1.589-629openalex-snapshot
Automated Generation of Masked Hardware
inferredcites →https://doi.org/10.48550/arxiv.1412.6572openalex-snapshot
Explaining and Harnessing Adversarial Examples
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Neural Architecture Optimization
inferredcites →https://doi.org/10.48550/arxiv.1808.07412openalex-snapshot
Ithemal: Accurate, Portable and Fast Basic Block Throughput Estimation using Deep Neural Networks
inferredcites →https://doi.org/10.48550/arxiv.2004.10746openalex-snapshot
Chip Placement with Deep Reinforcement Learning
inferredcites →https://doi.org/10.48550/arxiv.2006.09532openalex-snapshot
BoMaNet: Boolean Masking of an Entire Neural Network
inferredcites →https://doi.org/10.48550/arxiv.2007.08668openalex-snapshot
BRP-NAS: Prediction-based NAS using GCNs
inferredcites →https://doi.org/10.48550/arxiv.2201.06848openalex-snapshot
High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
inferredcites →https://doi.org/10.48550/arxiv.2305.10838openalex-snapshot
ProgSG: Cross-Modality Representation Learning for Programs in Electronic Design Automation
inferredcites →https://doi.org/10.48550/arxiv.2307.08635openalex-snapshot
Lightweight ML-based Runtime Prefetcher Selection on Many-core Platforms
inferredcites →https://doi.org/10.5555/2157654.2157684openalex-snapshot
Scaling probabilistic timing verification of hardware using abstractions in design source code
inferredcites →https://doi.org/10.7873/date.2013.017openalex-snapshot
Parallel Programming with SystemC for Loosely Timed Models: A Non-Intrusive Approach
inferredcites →https://doi.org/10.7873/date.2014.204openalex-snapshot
Time-decoupled parallel SystemC simulation
inferredcites →https://doi.org/10.7873/date.2015.0924openalex-snapshot
Dynamic Power and Performance Back-Annotation for Fast and Accurate Functional Hardware Simulation
inferredcites →https://doi.org/10.7873/date.2015.1105openalex-snapshot
The Next Generation of Virtual Prototyping: Ultra-Fast Yet Accurate Simulation of HW/SW Systems
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