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Scalability bottlenecks discovery in MPSoC platforms using data mining on simulation traces
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-540-74466-5_14openalex-snapshot
Profiling of Task-Based Applications on Shared Memory Machines: Scalability and Bottlenecks
inferredcites →https://doi.org/10.1109/iiswc.2011.6114195openalex-snapshot
Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads
inferredcites →https://doi.org/10.1109/ispass.2012.6189221openalex-snapshot
Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications
inferredcites →https://doi.org/10.1109/rsp.2011.5929983openalex-snapshot
A non intrusive simulation-based trace system to analyse Multiprocessor Systems-on-Chip software
inferredcites →https://doi.org/10.1109/tc.2006.22openalex-snapshot
Debug support strategy for systems-on-chips with multiple processor cores
inferredcites →https://doi.org/10.2307/2346830openalex-snapshot
Algorithm AS 136: A K-Means Clustering Algorithm
inferredcites →https://doi.org/10.7873/date.2013.161openalex-snapshot
Data Mining MPSoC Simulation Traces to Identify Concurrent Memory Access Patterns
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s10470-020-01645-6openalex-snapshot
Extracting method of packet dependence from NoC simulation traces using association rule mining
inferred← citeshttps://doi.org/10.1016/j.sysarc.2016.08.002openalex-snapshot
Systematic detection of memory related performance bottlenecks in GPGPU programs
inferred← citeshttps://doi.org/10.1016/j.sysarc.2016.12.009openalex-snapshot
Simulation-based HW/SW co-exploration of the concurrent execution of HEVC intra encoding algorithms for heterogeneous multi-core architectures
inferred← citeshttps://doi.org/10.1109/cjece.2015.2431220openalex-snapshot
Toward a Unified Characterization of Mapping Algorithms in Cloud and MPSoC Environments Using a Literature-Based Approach
inferred← citeshttps://doi.org/10.1109/icdmw.2016.0171openalex-snapshot
Towards Visualizing Hidden Structures
inferred← citeshttps://doi.org/10.1145/2656045.2656047openalex-snapshot
Automated software testing of memory performance in embedded GPUs
inferred← citeshttps://doi.org/10.1145/2693433.2693437openalex-snapshot
Collecting traces in dynamic binary translation based virtual prototyping platforms
inferred← citeshttps://doi.org/10.3384/9789179294885openalex-snapshot
Performance and Security Analysis for GPU-Based Applications
inferred← citeshttps://doi.org/10.70675/39b3fed1z0d9cz43a2z8c7dz6c383333ebf5openalex-snapshot
Frequent itemset sampling of high throughput streams on FPGA accelerators
inferred← citeshttps://doi.org/10.7873/date.2015.0715openalex-snapshot
Reducing Trace Size in Multimedia Applications Endurance Tests
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