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A mechanically verified code generator
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-94-011-1793-7_2openalex-snapshot
Towards a Mathematical Science of Computation
inferredcites →https://doi.org/10.1007/bf00243133openalex-snapshot
A mechanically verified language implementation
inferredcites →https://doi.org/10.1016/0378-4754(89)90181-xopenalex-snapshot
A computational logic handbook
inferredcites →https://doi.org/10.1090/psapm/019/0242403openalex-snapshot
Correctness of a compiler for arithmetic expressions
inferredcites →https://doi.org/10.1093/comjnl/12.1.41openalex-snapshot
Proving Properties of Programs by Structural Induction
inferredcites →https://doi.org/10.1109/32.41331openalex-snapshot
Kit: a study in operating system verification
inferredcites →https://doi.org/10.1145/390016.808428openalex-snapshot
An approach to compiler correctness
inferredcites →https://doi.org/10.21236/ada052911openalex-snapshot
Interactive Compiler Proving Using Hoare Proof Rules
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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On the Verification of Memory Management Mechanisms
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Formal Verification of a Java Compiler in Isabelle
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A theorem prover for a computational logic
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A provably correct compiler generator
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Provably correct compiler development and implementation
inferred← citeshttps://doi.org/10.1007/3-540-56922-7_22openalex-snapshot
A mechanically verified application for a mechanically verified environment
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Mechanizing a programming logic for the concurrent programming language microSR in HOL
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Mechanized inductive proof of properties of a simple code optimizer
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Parameterized Program Equivalence Checking
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Automated Proof of the Correctness of a Compiling Specification
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Using LP to Study the Language PL 0 +
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Formal Hardware Verification Methods: A Survey
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Engineering a Formal, Executable x86 ISA Simulator for Software Verification
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A Machine-Verified Code Generator
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Formal Verification of Gate-Level Computer Systems
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Verifying Local Transformations on Relaxed Memory Models
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Functional Big-Step Semantics
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Compiler Correctness and Input/Output
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Microprocessor Assurance and the Role of Theorem Proving
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Microprocessor Assurance and the Role of Theorem Proving
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Formal hardware verification methods: A survey
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An approach to systems verification
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Proof movie — A proof with the Boyer-Moore prover
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Mechanically verifying safety and liveness properties of delay insensitive circuits
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Deriving correctness properties of compiled code
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The Boyer-Moore theorem prover and its interactive enhancement
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Deriving Correctness Properties of Compiled Code
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Cobalt: A Language for Writing Provably-Sound Compiler Optimizations
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Verified bytecode verification and type-certifying compilation
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A Detailed Processor Model for Verification of Real-Time Applications 1
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Extracting a formally verified, fully executable compiler from a proof assistant
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Towards a verified MiniSML/SECD system
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The DUAL-EVAL hardware description language and its use in the formal specification and verification of the FM9001 microprocessor
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Automatically proving the correctness of compiler optimizations
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The design and implementation of a certifying compiler
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A Provably Correct Compiler Generator
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