On the public citation graph
Kit and the short stack
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/bf00243131openalex-snapshot
An approach to systems verification
inferredcites →https://doi.org/10.1007/bf00243132openalex-snapshot
Microprocessor design verification
inferredcites →https://doi.org/10.1007/bf00243133openalex-snapshot
A mechanically verified language implementation
inferredcites →https://doi.org/10.1007/bf00243134openalex-snapshot
A mechanically verified code generator
inferredcites →https://doi.org/10.1016/0378-4754(89)90181-xopenalex-snapshot
A computational logic handbook
inferredcites →https://doi.org/10.1109/32.41331openalex-snapshot
Kit: a study in operating system verification
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/11560548_23openalex-snapshot
On the Verification of Memory Management Mechanisms
inferred← citeshttps://doi.org/10.1007/3-540-52885-7_75openalex-snapshot
A theorem prover for a computational logic
inferred← citeshttps://doi.org/10.1007/978-3-030-45237-7_6openalex-snapshot
Highly Automated Formal Proofs over Memory Usage of Assembly Code
inferred← citeshttps://doi.org/10.1007/978-3-540-87873-5_15openalex-snapshot
A Verification Approach for System-Level Concurrent Programs
inferred← citeshttps://doi.org/10.1007/978-3-642-15057-9_3openalex-snapshot
Automated Verification of a Small Hypervisor
inferred← citeshttps://doi.org/10.1007/978-3-642-16265-7_9openalex-snapshot
From Operating-System Correctness to Pervasively Verified Applications
inferred← citeshttps://doi.org/10.1007/978-3-642-33826-7_13openalex-snapshot
Completing the Automated Verification of a Small Hypervisor – Assembler Code Verification
inferred← citeshttps://doi.org/10.1007/978-3-642-77810-0_9openalex-snapshot
Developing Complex Software for Critical Systems
inferred← citeshttps://doi.org/10.1007/978-3-642-88049-0_123openalex-snapshot
Towards Provable Correct Real-Time Systems
inferred← citeshttps://doi.org/10.1007/978-3-7091-9198-9_13openalex-snapshot
Verification of Memory Management Units
inferred← citeshttps://doi.org/10.1007/bf00121125openalex-snapshot
Formal hardware verification methods: A survey
inferred← citeshttps://doi.org/10.1007/bf00243131openalex-snapshot
An approach to systems verification
inferred← citeshttps://doi.org/10.1007/bf00709138openalex-snapshot
Experiences with software specification and verification using LP, the Larch proof assistant
inferred← citeshttps://doi.org/10.1007/bfb0020002openalex-snapshot
Mathematical methods for digital systems development
inferred← citeshttps://doi.org/10.1007/s10817-009-9119-8openalex-snapshot
Proving Fairness and Implementation Correctness of a Microkernel Scheduler
inferred← citeshttps://doi.org/10.1007/s10817-009-9126-9openalex-snapshot
Operating System Verification
inferred← citeshttps://doi.org/10.1007/s12046-009-0002-4openalex-snapshot
Operating system verification—An overview
inferred← citeshttps://doi.org/10.1007/s12046-009-0004-2openalex-snapshot
Proving the correctness of client/server software
inferred← citeshttps://doi.org/10.1016/0898-1221(94)00215-7openalex-snapshot
The Boyer-Moore theorem prover and its interactive enhancement
inferred← citeshttps://doi.org/10.1016/j.procs.2020.03.183openalex-snapshot
Verification of Virtual Machine Architecture in a Hypervisor through Model Checking
inferred← citeshttps://doi.org/10.1109/hol.1991.596276openalex-snapshot
Verification Of Composed Hardware Systems Using CCS
inferred← citeshttps://doi.org/10.1109/hol.1991.596287openalex-snapshot
Design Choices In Specification Languages And Verification Systems
inferred← citeshttps://doi.org/10.1109/iccd.2005.110openalex-snapshot
Towards the formal verification of lower system layers in automotive systems
inferred← citeshttps://doi.org/10.1109/icse.1992.753486openalex-snapshot
Trusted Computing Systems: The ProCoS* Experience
inferred← citeshttps://doi.org/10.22028/d291-25927openalex-snapshot
Formal specification of a simple operating system
inferred← citeshttps://doi.org/10.22028/d291-26017openalex-snapshot
Formal specification and verification of a microkernel
inferred← citeshttps://doi.org/10.22028/d291-26479openalex-snapshot
TLB virtualization in the context of hypervisor verification
inferred← citeshttps://doi.org/10.48550/arxiv.1309.6226openalex-snapshot
Automation of Mathematical Induction as part of the History of Logic
inferred← citeshttps://doi.org/10.82444/warw.33768268openalex-snapshot
A formal theory of railway track networks in higher-order logic and its applications in interlocking design
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