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The butterfly barrier

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1016/0167-8191(86)90030-xopenalex-snapshot
Effects of synchronization barriers on multiprocessor performance
inferredcites →https://doi.org/10.1016/0167-8191(87)90066-4openalex-snapshot
A butterfly processor-memory interconnection for a vector processing environment
inferredcites →https://doi.org/10.1109/tc.1985.6312198openalex-snapshot
“Hot spot” contention and combining in multistage interconnection networks
inferredcites →https://doi.org/10.1145/2465.214917openalex-snapshot
Reduced instruction set computers
inferredcites →https://doi.org/10.1145/357062.357068openalex-snapshot
A New Approach to Proving the Correctness of Multiprocess Programs
inferredcites →https://doi.org/10.1145/5383.5385openalex-snapshot
The mutual exclusion problem

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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A barrier optimization framework for NUMA multi‐core system
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Reducing the burden of parallel loop schedulers for many‐core processors
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Combining reduction with synchronization barrier on multi‐core processors
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Performance Implications of Synchronization Support for Parallel Fortran Programs
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Static Barrier MIMD: Architecture and Performance Analysis
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Locks, Directories, and Weak Coherence—a Recipe for Scalable Shared Memory Architectures
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Shared-Memory Synchronization
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A Practical Approach for Constructing a Parallel Network Simulator
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Distributed Generalized Dynamic Barrier Synchronization
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Effective Barrier Synchronization on Intel Xeon Phi Coprocessor
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Two algorithms for barrier synchronization
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Initializing memory shared by several processors
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A scalable implementation of barrier synchronization using an adaptive combining tree
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A network model of barrier synchronization algorithms
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Synchronization barrier and related tools for shared memory parallel programming
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Fast, contention-free combining tree barriers for shared-memory multiprocessors
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Strategy for data-flow synchronizations in stencil parallel computations on multi-/manycore systems
inferred← citeshttps://doi.org/10.1007/s11771-012-1348-zopenalex-snapshot
Energy optimization of representative barrier algorithms
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An SR approach to multiway rendezvous
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Seismic Data Processing on a Simd Array Parallel Supercomputer
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Cooperative resynchronization to improve the reliability of colocated IEEE 802.15.4 -TSCH networks in dense deployments
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Generalisation of recursive doubling for AllReduce: Now with simulation
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Adaptive MPI collective operations based on evaluations in LogP model
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Distributed-sum termination detection supporting multithreaded execution
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Introduction to Parallel Computing
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Capability Classes of Multiprocessor Synchronization Techniques
inferred← citeshttps://doi.org/10.1109/aspdac.2015.7058982openalex-snapshot
A flexible hardware barrier mechanism for many-core processors
inferred← citeshttps://doi.org/10.1109/cluster.2015.63openalex-snapshot
The Cost of Synchronizing Imbalanced Processes in Message Passing Systems
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Effective dynamic scheduling and memory management on parallel processing systems
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An Integrated Tutorial on InfiniBand, Verbs, and MPI
inferred← citeshttps://doi.org/10.1109/csf.2016.29openalex-snapshot
Automated Reasoning for Equivalences in the Applied Pi Calculus with Barriers
inferred← citeshttps://doi.org/10.1109/fareastcon.2018.8602527openalex-snapshot
Adaptive Barrier Algorithm in MPI Based on Analytical Evaluations for Communication Time in the LogP Model of Parallel Computation
inferred← citeshttps://doi.org/10.1109/fpl.2009.5272560openalex-snapshot
Hardware implementation of MPI_Barrier on an FPGA cluster
inferred← citeshttps://doi.org/10.1109/hipc.1996.565849openalex-snapshot
A distributed barrier synchronization solution in hardware for 2D-mesh multicomputers
inferred← citeshttps://doi.org/10.1109/hipc.2011.6152729openalex-snapshot
Highly scalable barriers for future high-performance computing clusters
inferred← citeshttps://doi.org/10.1109/icdsc.2001.918947openalex-snapshot
Distributed network simulations using the dynamic simulation backplane
inferred← citeshttps://doi.org/10.1109/icpads.2002.1183406openalex-snapshot
Evaluating the speedup of a MPI-based distributed dispersion simulator for groundwater systems
inferred← citeshttps://doi.org/10.1109/icpads.2002.1183453openalex-snapshot
Communication pattern based methodology for performance analysis of termination detection schemes
inferred← citeshttps://doi.org/10.1109/icppw.2002.1039746openalex-snapshot
An evaluation of the speedup of a preliminary distributed MPI-implementation for groundwater simulation dispersion system
inferred← citeshttps://doi.org/10.1109/icppw.2005.14openalex-snapshot
A Practical Approach to the Rating of Barrier Algorithms Using the LogP Model and Open MPI
inferred← citeshttps://doi.org/10.1109/ipdps.2006.1639561openalex-snapshot
Fast barrier synchronization for InfiniBand/spl trade/
inferred← citeshttps://doi.org/10.1109/ipdps.2010.5470414openalex-snapshot
Hierarchical phasers for scalable synchronization and reductions in dynamic parallelism
inferred← citeshttps://doi.org/10.1109/ipdps.2011.271openalex-snapshot
An Optimized Reduction Design to Minimize Atomic Operations in Shared Memory Multiprocessors
inferred← citeshttps://doi.org/10.1109/ipdpsw.2018.00124openalex-snapshot
Barrier Synchronization: Simplified, Generalized, and Solved Without Mutual Exclusion
inferred← citeshttps://doi.org/10.1109/ipdpsw52791.2021.00096openalex-snapshot
Efficient and Eventually Consistent Collective Operations
inferred← citeshttps://doi.org/10.1109/ipps.1994.288243openalex-snapshot
Barrier synchronization techniques for distributed process creation
inferred← citeshttps://doi.org/10.1109/isca.1989.714582openalex-snapshot
On Data Synchronization For Multiprocessors
inferred← citeshttps://doi.org/10.1109/isca.1990.134504openalex-snapshot
Synchronization with multiprocessor caches
inferred← citeshttps://doi.org/10.1109/isorcw.2010.17openalex-snapshot
Consistency Challenges in Self-Organizing Distributed Hard Real-Time Systems
inferred← citeshttps://doi.org/10.1109/ispan.1997.645132openalex-snapshot
The barrier synchronization impact on the MPI-programs performance using a cluster of workstations
inferred← citeshttps://doi.org/10.1109/mascot.2009.5367047openalex-snapshot
A sensitivity analysis of a new hardware-supported Global Synchronization Unit
inferred← citeshttps://doi.org/10.1109/pads.2000.847153openalex-snapshot
Network aware time management and event distribution
inferred← citeshttps://doi.org/10.1109/pads.2009.19openalex-snapshot
Hardware Supported Time Synchronization in Multi-core Architectures
inferred← citeshttps://doi.org/10.1109/paw-atm.2018.00006openalex-snapshot
Efficient Algorithms for Collective Operations with Notified Communication in Shared Windows
inferred← citeshttps://doi.org/10.1109/pdcat.2003.1236385openalex-snapshot
A practical approach for constructing a parallel network simulator
inferred← citeshttps://doi.org/10.1109/spdp.1990.143520openalex-snapshot
Barrier synchronization over multistage interconnection networks
inferred← citeshttps://doi.org/10.1109/spdp.1990.143645openalex-snapshot
Distributed task processing performance on a NUMA shared memory multiprocessor
inferred← citeshttps://doi.org/10.1109/superc.1990.130019openalex-snapshot
Fast barrier synchronization hardware
inferred← citeshttps://doi.org/10.1109/tbme.2016.2591960openalex-snapshot
Guidelines for Reproducibly Building and Simulating Systems Biology Models
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A Scalable HLA RTI System Based on Multiple-FedServ Architecture
inferred← citeshttps://doi.org/10.1109/usbereit51232.2021.9455093openalex-snapshot
Optimizing Barrier Algorithms on Asymmetric Subsystems of NUMA Machines
inferred← citeshttps://doi.org/10.1109/vlsi-dat.2016.7482560openalex-snapshot
Scalable mutli-layer barrier synchronization on NoC
inferred← citeshttps://doi.org/10.1109/wsc.2006.323041openalex-snapshot
Parallel and Distributed Simulation: Traditional Techniques and Recent Advances
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Algorithms for scalable synchronization on shared-memory multiprocessors
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Synchronization without contention
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Synchronization without contention
inferred← citeshttps://doi.org/10.1145/106974.106999openalex-snapshot
Synchronization without contention
inferred← citeshttps://doi.org/10.1145/106975.106999openalex-snapshot
Synchronization without contention
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Characterizing memory hot spots in a shared memory MIMD machine
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Efficient fault tolerant algorithms for resource allocation in distributed systems
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Implementation and performance analysis of non-blocking collective operations for MPI
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Subset barrier synchronization on a private-memory parallel system
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An effective synchronization network for hot-spot accesses
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Avoiding unbounded priority inversion in barrier protocols using gang priority management
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Synchronization hardware for networks of workstations
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Generalisation of Recursive Doubling for AllReduce
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Synchronization with multiprocessor caches
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Unleashing Parallelism with Elastic-Barriers
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Efficient synchronization primitives for large-scale cache-coherent multiprocessors
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Efficient synchronization primitives for large-scale cache-coherent multiprocessors
inferred← citeshttps://doi.org/10.1145/74925.74972openalex-snapshot
On data synchronization for multiprocessors
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On data synchronization for multiprocessors
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A federated approach to distributed network simulation
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Concurrent Data Structures
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Energy, Memory, and Runtime Tradeoffs for Implementing Collective Communication Operations
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Implications of application usage characteristics for collective communication offload
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Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs
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Cooperative communication based barrier synchronization in on-chip mesh architectures
inferred← citeshttps://doi.org/10.2200/s00499ed1v01y201304cac023openalex-snapshot
Shared-Memory Synchronization
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CAPABILITY CLASSES OF MULTIPROCESSOR SYNCHRONIZATION TECHNIQUES
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Parallel Simulation Methods of Heteroepitaxial Growth on Multiprocessor Systems with Shared Memory
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Automated reasoning for equivalences in the applied pi calculus with barriers
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Design of Barrier Network of Dawning 5000 High Performance Computer
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Energy, Memory, and Runtime Tradeoffs for Implementing Collective Communication Operations
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DiRong1.0: a distributed implementation for improving routing network generation in model coupling
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Re: Wishing more discussions
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Barrier Optimization on Asymmetrical NUMA Subsystems
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Barrier synchronization hierarchical algorithm for multicore shared-memory systems
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Otimização das Operações Coletivas para um Aglomerado de 8 PCs usando uma Rede Ethernet 10 Mbs baseada em Hub
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