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Verifying distributed directory-based cache coherence protocols: S3.mp, a case study
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/j.1538-7305.1990.tb00101.xopenalex-snapshot
Algorithms for Automated Protocol Verification
inferredcites →https://doi.org/10.1007/978-1-4615-3604-8openalex-snapshot
Scalable Shared Memory Multiprocessors
inferredcites →https://doi.org/10.1007/978-1-4615-3604-8_2openalex-snapshot
Formal Specification of Memory Models
inferredcites →https://doi.org/10.1007/bf00625968openalex-snapshot
Better verification through symmetry
inferredcites →https://doi.org/10.1109/2.55497openalex-snapshot
A survey of cache coherence schemes for multiprocessors
inferredcites →https://doi.org/10.1109/2.55503openalex-snapshot
Distributed-directory scheme: scalable coherent interface
inferredcites →https://doi.org/10.1109/2.55504openalex-snapshot
Distributed-directory scheme: Stanford distributed-directory protocol
inferredcites →https://doi.org/10.1109/cmpeur.1990.113656openalex-snapshot
Scalable Coherent Interface
inferredcites →https://doi.org/10.1109/hicss.1994.323149openalex-snapshot
The S3.mp scalable shared memory multiprocessor
inferredcites →https://doi.org/10.1109/iccd.1992.276232openalex-snapshot
Protocol verification as a hardware design aid
inferredcites →https://doi.org/10.1109/tc.1979.1675439openalex-snapshot
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
inferredcites →https://doi.org/10.1145/165231.165233openalex-snapshot
The verification of cache coherence protocols
inferredcites →https://doi.org/10.1145/285055.285057openalex-snapshot
Formal verification of complex coherence protocols using symbolic state models
inferredcites →https://doi.org/10.1145/325096.325132openalex-snapshot
The directory-based cache coherence protocol for the DASH multiprocessor
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/3-540-45251-6_4openalex-snapshot
Proofs of Correctness of Cache-Coherence Protocols
inferred← citeshttps://doi.org/10.1007/3-540-49059-0_23openalex-snapshot
A Light-Weight Framework for Hardware Verification
inferred← citeshttps://doi.org/10.1007/3-540-61474-5_65openalex-snapshot
Verifying systems with replicated components in murϕ
inferred← citeshttps://doi.org/10.1007/978-3-642-41010-9_8openalex-snapshot
Formal Analysis of the ACE Specification for Cache Coherent Systems-on-Chip
inferred← citeshttps://doi.org/10.1007/s100090100043openalex-snapshot
A light-weight framework for hardware verification
inferred← citeshttps://doi.org/10.1016/s0164-1212(01)00034-6openalex-snapshot
Design of a scalable multiprocessor architecture and its simulation
inferred← citeshttps://doi.org/10.1023/a:1008723125149openalex-snapshot
Verifying Systems with Replicated Components in Murϕ
inferred← citeshttps://doi.org/10.1109/12.656100openalex-snapshot
Design verification of the S3.mp cache-coherent shared-memory system
inferred← citeshttps://doi.org/10.1109/71.879780openalex-snapshot
Formal automatic verification of cache coherence in multiprocessors with relaxed memory models
inferred← citeshttps://doi.org/10.1109/hldvt.2001.972815openalex-snapshot
Proving sequential consistency by model checking
inferred← citeshttps://doi.org/10.1109/hpca.2017.40openalex-snapshot
Efficient Sequential Consistency in GPUs via Relativistic Cache Coherence
inferred← citeshttps://doi.org/10.1109/iccd.1997.628906openalex-snapshot
Formal verification of the HAL S1 System cache coherence protocol
inferred← citeshttps://doi.org/10.1109/isca.2014.6853211openalex-snapshot
Fractal++: Closing the performance gap between fractal and conventional coherence
inferred← citeshttps://doi.org/10.1109/micro.2010.11openalex-snapshot
Fractal Coherence: Scalably Verifiable Cache Coherence
inferred← citeshttps://doi.org/10.1145/248621.248624openalex-snapshot
Verification techniques for cache coherence protocols
inferred← citeshttps://doi.org/10.1145/2541940.2541982openalex-snapshot
High-performance fractal coherence
inferred← citeshttps://doi.org/10.1145/2644865.2541982openalex-snapshot
High-performance fractal coherence
inferred← citeshttps://doi.org/10.1145/2654822.2541982openalex-snapshot
High-performance fractal coherence
inferred← citeshttps://doi.org/10.1145/285055.285057openalex-snapshot
Formal verification of complex coherence protocols using symbolic state models
inferred← citeshttps://doi.org/10.1145/307988.307989openalex-snapshot
Formal verification in hardware design
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