On the public citation graph
Algebraic models and the correctness of microprocessors
0 signed · 42 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/0-387-97226-9_23openalex-snapshot
Formalising the design of an SECD chip
inferredcites →https://doi.org/10.1007/3-540-57826-9_139openalex-snapshot
Report on the UCD microcoded Viper verification project
inferredcites →https://doi.org/10.1007/3-540-57960-5openalex-snapshot
FM8501: A Verified Microprocessor
inferredcites →https://doi.org/10.1007/978-1-349-21622-2openalex-snapshot
Microprogrammed Systems Design
inferredcites →https://doi.org/10.1007/978-1-4613-2007-4_1openalex-snapshot
Implementing Safety-Critical Systems: The VIPER Microprocessor
inferredcites →https://doi.org/10.1007/978-1-4613-2007-4_2openalex-snapshot
A Proof of Correctness of the Viper Microprocessor: The First Level
inferredcites →https://doi.org/10.1007/978-1-4613-2007-4_3openalex-snapshot
HOL: A Proof Generating System for Higher-Order Logic
inferredcites →https://doi.org/10.1007/978-1-4613-2007-4_4openalex-snapshot
Formal Verification and Implementation of a Microprocessor
inferredcites →https://doi.org/10.1007/978-3-642-76771-5openalex-snapshot
Universal Algebra for Computer Scientists
inferredcites →https://doi.org/10.1007/978-3-642-76799-9_1openalex-snapshot
Theory of Computation and Specification over Abstract Data Types, and its Applications
inferredcites →https://doi.org/10.1007/bf00243132openalex-snapshot
Microprocessor design verification
inferredcites →https://doi.org/10.1007/bfb0015045openalex-snapshot
A specification of the intel 8085 microprocessor: A case study
inferredcites →https://doi.org/10.1007/bfb0021713openalex-snapshot
Strongly-typed theory of structures and behaviours
inferredcites →https://doi.org/10.1007/bfb0021724openalex-snapshot
DDD-FM9001: Derivation of a verified microprocessor
inferredcites →https://doi.org/10.1016/b978-0-444-88074-1.50018-4openalex-snapshot
Algebraic Specification
inferredcites →https://doi.org/10.1017/cbo9780511569838.004openalex-snapshot
A mechanized proof of correctness of a simple counter
inferredcites →https://doi.org/10.1017/cbo9780511569838.006openalex-snapshot
Verification of a systolic algorithm in process algebra
inferredcites →https://doi.org/10.1017/cbo9780511569845openalex-snapshot
Higher Order Logic and Hardware Verification
inferredcites →https://doi.org/10.1093/comjnl/6.4.308openalex-snapshot
The Mechanical Evaluation of Expressions
inferredcites →https://doi.org/10.1098/rsta.1992.0024openalex-snapshot
A formal HDL and its use in the FM9001 verification
inferredcites →https://doi.org/10.1098/rsta.1992.0030openalex-snapshot
Occam in the specification and verification of microprocessors
inferredcites →https://doi.org/10.1109/12.83619openalex-snapshot
The formal description and verification of hardware timing
inferredcites →https://doi.org/10.48456/tr-135openalex-snapshot
Using recursive types to reason about hardware in higher order logic
inferredcites →https://doi.org/10.48456/tr-42openalex-snapshot
Proving a computer correct with the LCF_LSM hardware verification system
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/10930755_2openalex-snapshot
Formal Specification and Verification of ARM6
inferred← citeshttps://doi.org/10.1007/11548133_11openalex-snapshot
An Algebraic Framework for Verifying the Correctness of Hardware with Input and Output: A Formalization in HOL
inferred← citeshttps://doi.org/10.1007/3-540-49254-2_2openalex-snapshot
Streams, Stream Transformers and Domain Representations
inferred← citeshttps://doi.org/10.1007/3-540-49254-2_5openalex-snapshot
Algebraic Models of Superscalar Microprocessor Implementations: a Case Study
inferred← citeshttps://doi.org/10.1007/3-540-49254-2_6openalex-snapshot
Hierarchies of Spatially Extended Systems and Synchronous Concurrent Algorithms
inferred← citeshttps://doi.org/10.1007/3-540-60385-9_6openalex-snapshot
Formal design of a class of computers — its high stage: abstract microprogramming
inferred← citeshttps://doi.org/10.1007/3-540-61254-8_30openalex-snapshot
Abstraction of hardware construction
inferred← citeshttps://doi.org/10.1007/3-540-63475-4_1openalex-snapshot
Symbolic trajectory evaluation
inferred← citeshttps://doi.org/10.1007/978-3-642-24559-6_39openalex-snapshot
Managing Complexity through Abstraction: A Refinement-Based Approach to Formalize Instruction Set Architectures
inferred← citeshttps://doi.org/10.1007/978-3-642-79361-5_10openalex-snapshot
Computable Functions on Stream Algebras
inferred← citeshttps://doi.org/10.1007/bfb0031820openalex-snapshot
An algebraic model of correctness for superscalar microprocessors
inferred← citeshttps://doi.org/10.1016/j.amc.2009.04.058openalex-snapshot
Unifying computers and dynamical systems using the theory of synchronous concurrent algorithms
inferred← citeshttps://doi.org/10.14288/1.0051407openalex-snapshot
Compositional model checking of partially ordered state spaces
inferred← citeshttps://doi.org/10.48456/tr-548openalex-snapshot
Formal verification of the ARM6 micro-architecture
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.