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Coq and hardware verification: A case study

https://doi.org/10.1007/bfb0105401
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-09724-4openalex-snapshot
Edinburgh LCF
inferredcites →https://doi.org/10.1007/3-540-15983-5_13openalex-snapshot
Constructions: A higher order proof system for mechanizing mathematics
inferredcites →https://doi.org/10.1007/3-540-59047-1_53openalex-snapshot
A tutorial on using PVS for hardware verification
inferredcites →https://doi.org/10.1007/3-540-61511-3_85openalex-snapshot
CtCoq: A system presentation
inferredcites →https://doi.org/10.1007/3-540-61780-9_72openalex-snapshot
Circuits as streams in Coq: Verification of a sequential multiplier
inferredcites →https://doi.org/10.1007/bf00243132openalex-snapshot
Microprocessor design verification
inferredcites →https://doi.org/10.1007/bf01384073openalex-snapshot
Using transformations and verification in circuit design
inferredcites →https://doi.org/10.1007/bfb0014048openalex-snapshot
Extracting text from proofs
inferredcites →https://doi.org/10.1007/bfb0037116openalex-snapshot
Inductive definitions in the system Coq rules and properties
inferredcites →https://doi.org/10.1016/0304-3975(86)90044-7openalex-snapshot
The system F of variable types, fifteen years later
inferredcites →https://doi.org/10.1016/0378-4754(89)90181-xopenalex-snapshot
A computational logic handbook
inferredcites →https://doi.org/10.1016/b978-0-444-89880-7.50018-8openalex-snapshot
A Methodology for Reusable Hardware Proofs
inferredcites →https://doi.org/10.1017/cbo9780511569845.004openalex-snapshot
Hardware Verification using Higher Order Logic
inferredcites →https://doi.org/10.1098/rsta.1992.0025openalex-snapshot
Using Nuprl for the verification and synthesis of hardware
inferredcites →https://doi.org/10.1109/32.58783openalex-snapshot
Specification and verification using dependent types
inferredcites →https://doi.org/10.1109/aspdac.1995.486361openalex-snapshot
Applying formal verification to a commercial microprocessor
inferredcites →https://doi.org/10.3233/aic-1988-1104openalex-snapshot
Basic Research Actions
inferredcites →https://doi.org/10.48456/tr-91openalex-snapshot
Hardware verification using higher-order logic

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/11786160_15openalex-snapshot
A Type Theoretic Framework for Formal Metamodelling
inferred← citeshttps://doi.org/10.1007/3-540-48256-3_7openalex-snapshot
Hardware Verification Using Co-induction in COQ
inferred← citeshttps://doi.org/10.1007/3-540-49519-3_16openalex-snapshot
Combined Formal Post- and Presynthesis Verification in High Level Synthesis
inferred← citeshttps://doi.org/10.1007/3-540-61780-9_72openalex-snapshot
Circuits as streams in Coq: Verification of a sequential multiplier
inferred← citeshttps://doi.org/10.1007/978-3-658-19606-6_7openalex-snapshot
Von der Beweistheorie zu maschinellen Beweisassistenten
inferred← citeshttps://doi.org/10.1007/978-3-658-23715-8_59-1openalex-snapshot
Epilog: Grenzen der KI – theoretisch, praktisch, ethisch
inferred← citeshttps://doi.org/10.1007/978-3-658-23715-8_7-1openalex-snapshot
Von der Beweistheorie zu maschinellen Beweisassistenten
inferred← citeshttps://doi.org/10.1007/978-3-662-59717-0_3openalex-snapshot
Logical Thinking Becomes Automatic
inferred← citeshttps://doi.org/10.1007/978-3-662-66326-4_5openalex-snapshot
INFORMATIONSTECHNOLOGIE UND NACHHALTIGKEIT
inferred← citeshttps://doi.org/10.1007/bfb0028386openalex-snapshot
Formal verification of concurrent programs in Lp and in Coq: A comparative analysis
inferred← citeshttps://doi.org/10.1007/bfb0053541openalex-snapshot
Analysis of a guard condition in type theory
inferred← citeshttps://doi.org/10.1007/bfb0105392openalex-snapshot
Theorem Proving in Higher Order Logics
inferred← citeshttps://doi.org/10.1007/s00165-004-0048-3openalex-snapshot
Certifying circuits in Type Theory
inferred← citeshttps://doi.org/10.1063/5.0074153openalex-snapshot
Formal verification of a 4 bit counter using Kami verification flow
inferred← citeshttps://doi.org/10.1109/12.713311openalex-snapshot
A mechanically checked proof of the AMD5/sub K/86/sup TM/ floating-point division program
inferred← citeshttps://doi.org/10.1109/mdat.2020.3013730openalex-snapshot
Hardware Penetration Testing Knocks Your SoCs Off
inferred← citeshttps://doi.org/10.1155/2021/5525539openalex-snapshot
CoCEC: An Automatic Combinational Circuit Equivalence Checker Based on the Interactive Theorem Prover
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