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Gate level fault diagnosis in scan-based BIST

https://doi.org/10.1109/date.2002.998301

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/12.780879openalex-snapshot

Diagnosis of scan cells in BIST environment

inferredcites →https://doi.org/10.1109/43.743733openalex-snapshot

Scan-based BIST fault diagnosis

inferredcites →https://doi.org/10.1109/54.262318openalex-snapshot

ScanBist: a multifrequency scan-based BIST method

inferredcites →https://doi.org/10.1109/dac.1992.227782openalex-snapshot

HOPE: an efficient parallel fault simulator

inferredcites →https://doi.org/10.1109/date.2001.915008openalex-snapshot

Diagnosis for scan-based BIST: reaching deep into the signatures

inferredcites →https://doi.org/10.1109/iccad.1989.77016openalex-snapshot

A diagnosis method using pseudo-random vectors without intermediate signatures

inferredcites →https://doi.org/10.1109/test.1988.207818openalex-snapshot

Identification of failing tests with cycling registers

inferredcites →https://doi.org/10.1109/test.1999.805618openalex-snapshot

Fault diagnosis in scan-based BIST using both time and space information

inferredcites →https://doi.org/10.1145/337292.337311openalex-snapshot

Improved fault diagnosis in scan-based BIST via superposition

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/s10836-006-9442-5openalex-snapshot

Improve the Quality of Per-Test Fault Diagnosis Using Output Information

inferred← citeshttps://doi.org/10.1016/j.micpro.2008.03.006openalex-snapshot

Embedded fault diagnosis in digital systems with BIST

inferred← citeshttps://doi.org/10.1109/ats.2011.55openalex-snapshot

Diagnostic Test of Robust Circuits

inferred← citeshttps://doi.org/10.1109/dftvs.2003.1250099openalex-snapshot

BIST based fault diagnosis using ambiguous test set

inferred← citeshttps://doi.org/10.1109/dsd.2007.4341530openalex-snapshot

Fault Diagnosis in Integrated Circuits with BIST

inferred← citeshttps://doi.org/10.1109/ets.2005.26openalex-snapshot

From Embedded Test to Embedded Diagnosis

inferred← citeshttps://doi.org/10.1109/ets.2011.25openalex-snapshot

Structural In-Field Diagnosis for Random Logic Circuits

inferred← citeshttps://doi.org/10.1109/ets.2012.6233025openalex-snapshot

Built-in self-diagnosis exploiting strong diagnostic windows in mixed-mode test

inferred← citeshttps://doi.org/10.1109/ets.2014.6847796openalex-snapshot

Diagnosis of multiple faults with highly compacted test responses

inferred← citeshttps://doi.org/10.1109/icmel.2008.4559311openalex-snapshot

Embedded diagnosis in digital systems

inferred← citeshttps://doi.org/10.1109/iolts.2006.19openalex-snapshot

Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor

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