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Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1049/cce:20000608openalex-snapshot
Emerging on-ship debugging techniques for real-time embedded systems
inferredcites →https://doi.org/10.1109/mc.2007.118openalex-snapshot
Boosting Debugging Support for Complex Systems on Chip
inferredcites →https://doi.org/10.4271/2003-01-1205openalex-snapshot
Introduction to the Universal Measurement and Calibration Protocol XCP
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/11946441_73openalex-snapshot
TraceDo: An On-Chip Trace System for Real-Time Debug and Optimization in Multiprocessor SoC
inferred← citeshttps://doi.org/10.1007/s00502-010-0727-0openalex-snapshot
Eine neuartige Lösung für Test und Debugging in vernetzten eingebetteten Systemen
inferred← citeshttps://doi.org/10.1049/iet-sen.2011.0212openalex-snapshot
On‐chip support for software verification and debug in multi‐core embedded systems
inferred← citeshttps://doi.org/10.1049/iet-sen.2013.0236openalex-snapshot
Runtime verification monitoring for automotive embedded systems using the ISO 26262 Functional Safety Standard as a guide for the definition of the monitored properties
inferred← citeshttps://doi.org/10.1049/ip-cdt:20050194openalex-snapshot
Debug support for complex systems on-chip: a review
inferred← citeshttps://doi.org/10.1109/ahs.2006.4openalex-snapshot
A Generic On-Chip Debugger for Wireless Sensor Networks
inferred← citeshttps://doi.org/10.1109/ahs.2007.106openalex-snapshot
Trace algorithms for deeply integrated complex and hybrid SoCs
inferred← citeshttps://doi.org/10.1109/ahs.2007.107openalex-snapshot
TRICODA - Complex Data Analysis and Condition Monitoring based onv Neural Network Model
inferred← citeshttps://doi.org/10.1109/ahs.2007.18openalex-snapshot
A System Level Framework for Monitoring and Self Diagnosis in ESPACENET
inferred← citeshttps://doi.org/10.1109/ahs.2007.48openalex-snapshot
Ensuring data integrity via ICmetrics based security infrastructure
inferred← citeshttps://doi.org/10.1109/ahs.2008.53openalex-snapshot
A Framework for Self-Diagnosis and Condition Monitoring for Embedded Systems Using a SOM-Based Classifier
inferred← citeshttps://doi.org/10.1109/ahs.2008.8openalex-snapshot
Adaptive Online Profiling Hardware for ICmetrics Based Security
inferred← citeshttps://doi.org/10.1109/csae.2011.5952543openalex-snapshot
On-chip debug architecture for MCU-DSP Core based system-on-chip
inferred← citeshttps://doi.org/10.1109/date.2009.5090911openalex-snapshot
Generating the trace qualification configuration for MCDS from a high level language
inferred← citeshttps://doi.org/10.1109/icicdt.2007.4299586openalex-snapshot
Cell BE SOC Debug Features
inferred← citeshttps://doi.org/10.1109/imtc.2006.235970openalex-snapshot
Instrumentation of Real-Time Embedded Systems for Performance Analysis
inferred← citeshttps://doi.org/10.1109/imtc.2007.379044openalex-snapshot
Optoelectronic Measurement Interface for System-on-Chip Debug
inferred← citeshttps://doi.org/10.1109/iscas.2006.1692870openalex-snapshot
Debug support for embedded processor reuse
inferred← citeshttps://doi.org/10.1109/mc.2007.118openalex-snapshot
Boosting Debugging Support for Complex Systems on Chip
inferred← citeshttps://doi.org/10.1109/mtv.2006.7openalex-snapshot
Debug Support for Scalable System-on-Chip
inferred← citeshttps://doi.org/10.1109/tc.2006.22openalex-snapshot
Debug support strategy for systems-on-chips with multiple processor cores
inferred← citeshttps://doi.org/10.1109/tc.2010.122openalex-snapshot
On Using Lossy Compression for Repeatable Experiments during Silicon Debug
inferred← citeshttps://doi.org/10.1109/tcsi.2006.887613openalex-snapshot
A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors
inferred← citeshttps://doi.org/10.1109/test.2006.297671openalex-snapshot
Debug of the CELL Processor: Moving the Lab into Silicon
inferred← citeshttps://doi.org/10.1109/valid.2009.18openalex-snapshot
A High-Level Language and Compiler to Configure the Multi-core Debug Solution (MCDS)
inferred← citeshttps://doi.org/10.1145/1278480.1278604openalex-snapshot
An embedded multi-resolution AMBA trace analyzer for microprocessor-based SoC integration
inferred← citeshttps://doi.org/10.1145/1391469.1391688openalex-snapshot
An embedded infrastructure of debug and trace interface for the DSP platform
inferred← citeshttps://doi.org/10.1145/2906363.2906377openalex-snapshot
A Rule-based Methodology for Hardware Configuration Validation in Embedded Systems
inferred← citeshttps://doi.org/10.23919/date.2017.7927009openalex-snapshot
A non-intrusive, operating system independent spinlock profiler for embedded multicore systems
inferred← citeshttps://doi.org/10.34961/3542openalex-snapshot
Utilizing multicore architectures to enhance software verification in real-time embedded systems
inferred← citeshttps://doi.org/10.3850/9783981537079_0442openalex-snapshot
Trace-based Analysis Methodology of Program Flash Contention in Embedded Multicore Systems
inferred← citeshttps://doi.org/10.5555/1874620.1874993openalex-snapshot
Generating the trace qualification configuration for MCDS from a high level language
inferred← citeshttps://doi.org/10.71548/17175openalex-snapshot
New Algorithms and Architectures for Post-Silicon Validation
inferred← citeshttps://doi.org/10.71548/17589openalex-snapshot
ON-CHIP DEBUG ARCHITECTURES FOR IMPROVING OBSERVABILITY DURING POST-SILICON VALIDATION
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