On the public citation graph
Hardware Engines for Bus Encryption: A Survey of Existing Techniques
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1016/0267-3649(94)90017-5openalex-snapshot
Applied cryptography: Protocols, algorithms, and source code in C
inferredcites →https://doi.org/10.1109/12.729797openalex-snapshot
Cipher instruction search attack on the bus-encryption security microcontroller DS5002FP
inferredcites →https://doi.org/10.1109/eurmic.1999.794507openalex-snapshot
Enhancing security in the memory management unit
inferredcites →https://doi.org/10.1109/icvd.2004.1260985openalex-snapshot
Tamper resistance mechanisms for secure embedded systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/sec.1071openalex-snapshot
Ultra simple way to encrypt non‐volatile main memory
inferred← citeshttps://doi.org/10.1007/978-0-387-71829-3_9openalex-snapshot
Counteracting Power Analysis Attacks by Masking
inferred← citeshttps://doi.org/10.1007/978-1-4614-7915-4_21openalex-snapshot
An Overview of PIC Microcontrollers and Their Suitability for Cryptographic Algorithms
inferred← citeshttps://doi.org/10.1007/978-3-319-28865-9_6openalex-snapshot
Intrinsic Code Attestation by Instruction Chaining for Embedded Devices
inferred← citeshttps://doi.org/10.1016/b978-0-12-373892-9.00010-4openalex-snapshot
Verification and Security Issues in On-Chip Communication Architecture Design
inferred← citeshttps://doi.org/10.1016/j.cosrev.2022.100530openalex-snapshot
Elliptic Curve Cryptography; Applications, challenges, recent advances, and future trends: A comprehensive survey
inferred← citeshttps://doi.org/10.1016/j.future.2012.03.016openalex-snapshot
Bus and memory protection through chain-generated and tree-verified IV for multiprocessors systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2008.04.003openalex-snapshot
Secure communication in microcomputer bus systems for embedded devices
inferred← citeshttps://doi.org/10.1109/acsac.2008.45openalex-snapshot
Defending Against Attacks on Main Memory Persistence
inferred← citeshttps://doi.org/10.1109/ae.2016.7577276openalex-snapshot
Logboat — A simulation framework enabling CAN security assessments
inferred← citeshttps://doi.org/10.1109/codesisss.2015.7331377openalex-snapshot
Computer security by hardware-intrinsic authentication
inferred← citeshttps://doi.org/10.1109/date.2008.4484834openalex-snapshot
Operating System Controlled Processor-Memory Bus Encryption
inferred← citeshttps://doi.org/10.1109/dictap.2012.6215353openalex-snapshot
FPGA based pipelined architecture for RC5 encryption
inferred← citeshttps://doi.org/10.1109/hicss.2006.114openalex-snapshot
Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms
inferred← citeshttps://doi.org/10.1109/icsamos.2007.4285752openalex-snapshot
Secure and Authenticated Communication in Chip-Level Microcomputer Bus Systems with Tree Parity Machines
inferred← citeshttps://doi.org/10.1109/icspcc.2011.6061646openalex-snapshot
Board-level authentication through I/O fingerprinter
inferred← citeshttps://doi.org/10.1109/jetcas.2024.3491169openalex-snapshot
SecureComm: A Secure Data Transfer Framework for Neural Network Inference on CPU-FPGA Heterogeneous Edge Devices
inferred← citeshttps://doi.org/10.1109/nrsc.2007.371402openalex-snapshot
On Line Data and Voice Encryption System Based on FPGA Technology
inferred← citeshttps://doi.org/10.1109/spl.2007.371757openalex-snapshot
Bus Decryption Overhead Minimization with Code Compression
inferred← citeshttps://doi.org/10.1109/tdsc.2009.1openalex-snapshot
Differential Power Analysis Attacks to Precharged Buses: A General Analysis for Symmetric-Key Cryptographic Algorithms
inferred← citeshttps://doi.org/10.1109/trustcom.2011.51openalex-snapshot
Inter-Chip Authentication through I/O Character
inferred← citeshttps://doi.org/10.1145/1403375.1403657openalex-snapshot
Operating system controlled processor-memory bus encryption
inferred← citeshttps://doi.org/10.1145/1456455.1456461openalex-snapshot
A fast real-time memory authentication protocol
inferred← citeshttps://doi.org/10.1145/2345396.2345496openalex-snapshot
FPGA based sliding window architecture for RC5 encryption
inferred← citeshttps://doi.org/10.1145/3485823openalex-snapshot
Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution
inferred← citeshttps://doi.org/10.2200/s00720ed1v01y201605ase016openalex-snapshot
Virtual Design of an Audio Lifelogging System: Tools for IoT Systems
inferred← citeshttps://doi.org/10.3390/electronics11203361openalex-snapshot
Encryption AXI Transaction Core for Enhanced FPGA Security
inferred← citeshttps://doi.org/10.5555/2830840.2830856openalex-snapshot
Computer security by hardware-intrinsic authentication
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