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GraphStep: A System Architecture for Sparse-Graph Algorithms
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
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The Connection Machine
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The density advantage of configurable computing
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The message-driven processor: a multicomputer processing node with efficient mechanisms
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Hardware-assisted fast routing
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Efficient conflict driven learning in a Boolean satisfiability solver
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Active Pages: a computation model for intelligent memory
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Overview of the Architecture, Circuit Design, and Physical Implementation of a First-Generation Cell Processor
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Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
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Multi-processor Performance on the Tera MTA
inferredcites →https://doi.org/10.1109/vlsic.1997.623804openalex-snapshot
An Embedded DRAM-FPGA Chip With Instantaneous Logic Reconfiguration
inferredcites →https://doi.org/10.1109/vlsic.1999.797266openalex-snapshot
Embedded DRAM for a reconfigurable array
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Solving graph problems with dynamic computation structures
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Floating-point sparse matrix-vector multiply for FPGAs
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A limit study of local memory requirements using value reuse profiles
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Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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