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Agile Paging: Exceeding the Best of Nested and Shadow Paging
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/12.926161openalex-snapshot
Uniprocessor virtual memory without TLBs
inferredcites →https://doi.org/10.1109/40.710872openalex-snapshot
Virtual memory in contemporary microprocessors
inferredcites →https://doi.org/10.1109/hpca.2001.903252openalex-snapshot
Reevaluating online superpage promotion with hardware support
inferredcites →https://doi.org/10.1109/hpca.2011.5749717openalex-snapshot
Shared last-level TLBs for chip multiprocessors
inferredcites →https://doi.org/10.1109/hpca.2014.6835964openalex-snapshot
Increasing TLB reach by exploiting clustering in page translations
inferredcites →https://doi.org/10.1109/hpca.2015.7056034openalex-snapshot
Prediction-based superpage-friendly TLB designs
inferredcites →https://doi.org/10.1109/hpca.2015.7056035openalex-snapshot
Supporting superpages in non-contiguous physical memory
inferredcites →https://doi.org/10.1109/hpca.2016.7446066openalex-snapshot
Revisiting virtual L1 caches: A practical design using dynamic synonym remapping
inferredcites →https://doi.org/10.1109/hpca.2016.7446100openalex-snapshot
Energy-efficient address translation
inferredcites →https://doi.org/10.1109/iiswc.2014.6983034openalex-snapshot
Performance analysis of the memory management unit under scale-out workloads
inferredcites →https://doi.org/10.1109/isca.1998.694775openalex-snapshot
Increasing TLB reach using superpages backed by shadow memory
inferredcites →https://doi.org/10.1109/isca.2012.6237026openalex-snapshot
Reducing memory reference energy with opportunistic virtual caching
inferredcites →https://doi.org/10.1109/isca.2012.6237041openalex-snapshot
Revisiting hardware-assisted page walks for virtualized systems
inferredcites →https://doi.org/10.1109/ispass.2005.1430554openalex-snapshot
BioBench: A Benchmark Suite of Bioinformatics Applications
inferredcites →https://doi.org/10.1109/mc.1974.6323581openalex-snapshot
Survey of virtual machine research
inferredcites →https://doi.org/10.1109/micro.2010.26openalex-snapshot
Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors
inferredcites →https://doi.org/10.1109/micro.2012.32openalex-snapshot
CoLT: Coalesced Large-Reach TLBs
inferredcites →https://doi.org/10.1109/micro.2014.37openalex-snapshot
Efficient Memory Virtualization: Reducing Dimensionality of Nested Page Walks
inferredcites →https://doi.org/10.1109/mm.2016.10openalex-snapshot
Range Translations for Fast Virtual Memory
inferredcites →https://doi.org/10.1109/pact.2009.26openalex-snapshot
Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors
inferredcites →https://doi.org/10.1109/tc.2004.21openalex-snapshot
Concurrent support of multiple page sizes on a skewed associative TLB
inferredcites →https://doi.org/10.1145/1060289.1060299openalex-snapshot
Practical, transparent operating system support for superpages
inferredcites →https://doi.org/10.1145/1060289.1060307openalex-snapshot
Memory resource management in VMware ESX server
inferredcites →https://doi.org/10.1145/1168857.1168860openalex-snapshot
A comparison of software and hardware techniques for x86 virtualization
inferredcites →https://doi.org/10.1145/1186736.1186737openalex-snapshot
SPEC CPU2006 benchmark descriptions
inferredcites →https://doi.org/10.1145/1346281.1346286openalex-snapshot
Accelerating two-dimensional page walks for virtualized systems
inferredcites →https://doi.org/10.1145/17356.17398openalex-snapshot
An in-cache address translation mechanism
inferredcites →https://doi.org/10.1145/1952682.1952710openalex-snapshot
Selective hardware/software memory virtualization
inferredcites →https://doi.org/10.1145/195473.195531openalex-snapshot
Surpassing the TLB performance of superpages with less operating system support
inferredcites →https://doi.org/10.1145/2445572.2445574openalex-snapshot
TLB Improvements for Chip Multiprocessors
inferredcites →https://doi.org/10.1145/2485922.2485933openalex-snapshot
Improving virtualization in the presence of software managed translation lookaside buffers
inferredcites →https://doi.org/10.1145/2485922.2485943openalex-snapshot
Efficient virtual memory for big memory servers
inferredcites →https://doi.org/10.1145/2540708.2540741openalex-snapshot
Large-reach memory management unit caches
inferredcites →https://doi.org/10.1145/2640087.2645709openalex-snapshot
Paging Method Switching for QEMU-KVM Guest Machine
inferredcites →https://doi.org/10.1145/2749469.2749471openalex-snapshot
Redundant memory mappings for fast access to large memories
inferredcites →https://doi.org/10.1145/2830772.2830773openalex-snapshot
Large pages and lightweight memory management in virtualized environments
inferredcites →https://doi.org/10.1145/545214.545237openalex-snapshot
Going the distance for TLB prefetching
inferredcites →https://doi.org/10.1145/945461.945462openalex-snapshot
Xen and the art of virtualization
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-319-67630-2_44openalex-snapshot
Dynamic Paging Method Switching - An Implementation for KVM
inferred← citeshttps://doi.org/10.1109/hpca51647.2021.00046openalex-snapshot
DeACT: Architecture-Aware Virtual Memory Support for Fabric Attached Memory Systems
inferred← citeshttps://doi.org/10.1109/hpca61900.2025.00123openalex-snapshot
Marching Page Walks: Batching and Concurrent Page Table Walks for Enhancing GPU Throughput
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00050openalex-snapshot
Enhancing and Exploiting Contiguity for Fast Memory Virtualization
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00089openalex-snapshot
The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00046openalex-snapshot
Predicting Execution Times With Partial Simulations in Virtual Memory Research: Why and How
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00012openalex-snapshot
Elastic Translations: Fast Virtual Memory with Multiple Translation Sizes
inferred← citeshttps://doi.org/10.1109/pact58117.2023.00014openalex-snapshot
HugeGPT: Storing Guest Page Tables on Host Huge Pages to Accelerate Address Translation
inferred← citeshttps://doi.org/10.1109/rtss55097.2022.00028openalex-snapshot
PolyRhythm: Adaptive Tuning of a Multi-Channel Attack Template for Timing Interference
inferred← citeshttps://doi.org/10.1109/tc.2022.3145671openalex-snapshot
Accelerating Address Translation for Virtualization by Leveraging Hardware Mode
inferred← citeshttps://doi.org/10.1145/3079856.3080209openalex-snapshot
Do-It-Yourself Virtual Memory Translation
inferred← citeshttps://doi.org/10.1145/3079856.3080210openalex-snapshot
Rethinking TLB Designs in Virtualized Environments
inferred← citeshttps://doi.org/10.1145/3079856.3080211openalex-snapshot
Hardware Translation Coherence for Virtualized Systems
inferred← citeshttps://doi.org/10.1145/3093315.3037704openalex-snapshot
Efficient Address Translation for Architectures with Multiple Page Sizes
inferred← citeshttps://doi.org/10.1145/3140659.3080209openalex-snapshot
Do-It-Yourself Virtual Memory Translation
inferred← citeshttps://doi.org/10.1145/3140659.3080210openalex-snapshot
Rethinking TLB Designs in Virtualized Environments
inferred← citeshttps://doi.org/10.1145/3140659.3080211openalex-snapshot
Hardware Translation Coherence for Virtualized Systems
inferred← citeshttps://doi.org/10.1145/3273982.3273988openalex-snapshot
Hardware Translation Coherence for Virtualized Systems
inferred← citeshttps://doi.org/10.1145/3297858.3304044openalex-snapshot
A Framework for Memory Oversubscription Management in Graphics Processing Units
inferred← citeshttps://doi.org/10.1145/3307650.3322261openalex-snapshot
Using SMT to accelerate nested virtualization
inferred← citeshttps://doi.org/10.1145/3322205.3311076openalex-snapshot
Everything You Should Know About Intel SGX Performance on Virtualized Systems
inferred← citeshttps://doi.org/10.1145/3445814.3446709openalex-snapshot
Fast local page-tables for virtualized NUMA servers with vMitosis
inferred← citeshttps://doi.org/10.1145/3453933.3454013openalex-snapshot
(No)Compromis: paging virtualization is not a fatality
inferred← citeshttps://doi.org/10.1145/3453933.3454018openalex-snapshot
Extending Intel PML for hardware-assisted working set size estimation of VMs
inferred← citeshttps://doi.org/10.1145/3503222.3507718openalex-snapshot
Every walk’s a hit: making page walks single-access cache hits
inferred← citeshttps://doi.org/10.1145/3613424.3614276openalex-snapshot
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources
inferred← citeshttps://doi.org/10.1145/3613424.3614311openalex-snapshot
CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators
inferred← citeshttps://doi.org/10.1145/3620665.3640358openalex-snapshot
Direct Memory Translation for Virtualized Clouds
inferred← citeshttps://doi.org/10.1145/3620665.3640369openalex-snapshot
WASP: Workload-Aware Self-Replicating Page-Tables for NUMA Servers
inferred← citeshttps://doi.org/10.1145/3689031.3717473openalex-snapshot
A Hardware-Software Co-Design for Efficient Secure Containers
inferred← citeshttps://doi.org/10.1145/3725843.3756093openalex-snapshot
Learning to Walk: Architecting Learned Virtual Memory Translation
inferred← citeshttps://doi.org/10.2200/s00795ed1v01y201708cac042openalex-snapshot
Architectural and Operating System Support for Virtual Memory
inferred← citeshttps://doi.org/10.3390/electronics14081685openalex-snapshot
Latency-Aware and Auto-Migrating Page Tables for ARM NUMA Servers
inferred← citeshttps://doi.org/10.5821/dissertation-2117-403959openalex-snapshot
Advanced hardware prefetching in virtual memory systems
inferred← citeshttps://doi.org/10.70675/d3a42eadz5b5fz41bdzac06z4d1a9261f8ffopenalex-snapshot
Out of hypervisor (OoH) : when nested virtualization becomes practical
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