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Unbounded Transactional Memory
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/2.982915openalex-snapshot
Rsim: simulating shared-memory multiprocessors with ILP processors
inferredcites →https://doi.org/10.1109/88.260295openalex-snapshot
Multiple reservations and the Oklahoma update
inferredcites →https://doi.org/10.1109/isca.1993.698569openalex-snapshot
Transactional Memory: Architectural Support For Lock-free Data Structures
inferredcites →https://doi.org/10.1109/isca.2001.937450openalex-snapshot
Removing architectural bottlenecks to the scalability of speculative parallelization
inferredcites →https://doi.org/10.1145/319566.319567openalex-snapshot
On optimistic methods for concurrency control
inferredcites →https://doi.org/10.1145/319838.319854openalex-snapshot
An architecture for mostly functional languages
inferredcites →https://doi.org/10.1145/379240.379264openalex-snapshot
Removing architectural bottlenecks to the scalability of speculative parallelization
inferredcites →https://doi.org/10.1145/605397.605399openalex-snapshot
Transactional lock-free execution of lock-based programs
inferredcites →https://doi.org/10.1145/605398.605399openalex-snapshot
Transactional lock-free execution of lock-based programs
inferredcites →https://doi.org/10.1145/872035.872048openalex-snapshot
Software transactional memory for dynamic-sized data structures
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.2867openalex-snapshot
A queuing model‐based approach for the analysis of transactional memory systems
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Conflict Detection and Validation Strategies for Software Transactional Memory
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Optimizing Memory Transactions for Multicore Systems
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Coqa: Concurrent Objects with Quantized Atomicity
inferred← citeshttps://doi.org/10.1007/978-3-540-78791-4_20openalex-snapshot
Supporting Legacy Binary Code in a Software Transaction Compiler with Dynamic Binary Translation and Optimization
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SPMTM: A Novel ScratchPad Memory Based Hybrid Nested Transactional Memory Framework
inferred← citeshttps://doi.org/10.1007/978-3-642-11659-9_1openalex-snapshot
Transactional Memory Today
inferred← citeshttps://doi.org/10.1007/978-3-642-11950-7_13openalex-snapshot
Efficient Transaction Nesting in Hardware Transactional Memory
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Rechnerarchitekturen für Parallele und Verteilte Systeme
inferred← citeshttps://doi.org/10.1007/s00446-008-0073-1openalex-snapshot
Distributed speculative execution for reliability and fault tolerance: an operational semantics
inferred← citeshttps://doi.org/10.1007/s10766-016-0411-zopenalex-snapshot
Restart Optimization for Transactional Memory with Lazy Conflict Detection
inferred← citeshttps://doi.org/10.1007/s11219-017-9385-3openalex-snapshot
A systematic survey on automated concurrency bug detection, exposing, avoidance, and fixing techniques
inferred← citeshttps://doi.org/10.1007/s11390-009-9204-9openalex-snapshot
Certifying Concurrent Programs Using Transactional Memory
inferred← citeshttps://doi.org/10.1007/s11390-010-1065-8openalex-snapshot
Formal reasoning about lazy-STM programs
inferred← citeshttps://doi.org/10.1016/j.comnet.2009.02.006openalex-snapshot
An analytic framework for performance modeling of software transactional memory
inferred← citeshttps://doi.org/10.1016/j.jpdc.2010.02.003openalex-snapshot
Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems
inferred← citeshttps://doi.org/10.1016/j.jpdc.2011.04.005openalex-snapshot
Integrating file operations into transactional memory
inferred← citeshttps://doi.org/10.1016/j.scico.2006.05.006openalex-snapshot
Executing Java programs with transactional memory
inferred← citeshttps://doi.org/10.1016/j.scico.2006.05.010openalex-snapshot
Nested transactional memory: Model and architecture sketches
inferred← citeshttps://doi.org/10.1109/apcsac.2008.4625443openalex-snapshot
LogSPoTM: a scalable thread level speculation model based on transactional memory
inferred← citeshttps://doi.org/10.1109/bdcloud.2018.00128openalex-snapshot
Peapods: OS-Independent Memory Confidentiality for Cryptographic Engines
inferred← citeshttps://doi.org/10.1109/cgo.2007.38openalex-snapshot
Understanding Tradeoffs in Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/cmce.2010.5609908openalex-snapshot
Hardware/hybrid transactional memory
inferred← citeshttps://doi.org/10.1109/hipc.2009.5433206openalex-snapshot
Integrating and optimizing transactional memory in a data mining middleware
inferred← citeshttps://doi.org/10.1109/hipc.2009.5433207openalex-snapshot
Impact of early abort mechanisms on lock-based software transactional memory
inferred← citeshttps://doi.org/10.1109/hpca.2006.1598135openalex-snapshot
The Common Case Transactional Behavior of Multithreaded Programs
inferred← citeshttps://doi.org/10.1109/hpca.2007.346189openalex-snapshot
A Scalable, Non-blocking Approach to Transactional Memory
inferred← citeshttps://doi.org/10.1109/hpca.2007.346192openalex-snapshot
Colorama: Architectural Support for Data-Centric Synchronization
inferred← citeshttps://doi.org/10.1109/hpca.2010.5416653openalex-snapshot
LiteTM: Reducing transactional state overhead
inferred← citeshttps://doi.org/10.1109/hpcc.2008.24openalex-snapshot
Software Assisted Transact Cache to Support Efficient Unbounded Transactional Memory
inferred← citeshttps://doi.org/10.1109/hpcc.2008.71openalex-snapshot
Hardware Transactional Memory Supporting I/O Operations within Transactions
inferred← citeshttps://doi.org/10.1109/hpcc.2009.64openalex-snapshot
On the Performance of Commit-Time-Locking Based Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/iciecs.2009.5364492openalex-snapshot
Software Transactional Memory in Multicore Processors
inferred← citeshttps://doi.org/10.1109/icpp.2008.59openalex-snapshot
DiSTM: A Software Transactional Memory Framework for Clusters
inferred← citeshttps://doi.org/10.1109/icsamos.2008.4664859openalex-snapshot
Efficient management of speculative data in hardware transactional memory systems
inferred← citeshttps://doi.org/10.1109/ipdps.2007.370679openalex-snapshot
On the Role of Deterministic Fine-Grain Data Synchronization for Scientific Applications: A Revisit in the Emerging Many-Core Era
inferred← citeshttps://doi.org/10.1109/ipdps.2008.4536249openalex-snapshot
Intermediate checkpointing with conflicting access prediction in transactional memory systems
inferred← citeshttps://doi.org/10.1109/ipdps.2008.4536340openalex-snapshot
Investigating software Transactional Memory on clusters
inferred← citeshttps://doi.org/10.1109/ipdps.2008.4536385openalex-snapshot
STAMP: A universal algorithmic model for next-generation multithreaded machines and systems
inferred← citeshttps://doi.org/10.1109/ispass.2009.4919647openalex-snapshot
An analytic model of optimistic Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/l-ca.2006.18openalex-snapshot
Subtleties of transactional memory atomicity semantics
inferred← citeshttps://doi.org/10.1109/micro.2006.40openalex-snapshot
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
inferred← citeshttps://doi.org/10.1109/micro.2010.23openalex-snapshot
A Dynamically Adaptable Hardware Transactional Memory
inferred← citeshttps://doi.org/10.1109/pact.2007.11openalex-snapshot
A Study of a Transactional Parallel Routing Algorithm
inferred← citeshttps://doi.org/10.1109/pact.2007.4336228openalex-snapshot
A Study of a Transactional Parallel Routing Algorithm
inferred← citeshttps://doi.org/10.1109/pact.2007.74openalex-snapshot
The OpenTM Transactional Application Programming Interface
inferred← citeshttps://doi.org/10.1109/pact.2009.19openalex-snapshot
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
inferred← citeshttps://doi.org/10.1109/pact.2009.25openalex-snapshot
Improving Signatures by Locality Exploitation for Transactional Memory
inferred← citeshttps://doi.org/10.1109/pact.2009.37openalex-snapshot
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading
inferred← citeshttps://doi.org/10.1109/pdcat.2007.87openalex-snapshot
e-Science in the Cloud with CARMEN
inferred← citeshttps://doi.org/10.1109/pdp.2008.63openalex-snapshot
Characterization of Conflicts in Log-Based Transactional Memory (LogTM)
inferred← citeshttps://doi.org/10.1109/rsp.2007.6openalex-snapshot
A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation
inferred← citeshttps://doi.org/10.1109/rtcsa.2009.57openalex-snapshot
Real-Time Support for Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/sbac-pad.2008.18openalex-snapshot
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
inferred← citeshttps://doi.org/10.1109/sbac-pad.2008.29openalex-snapshot
Transactional WaveCache: Towards Speculative and Out-of-Order DataFlow Execution of Memory Operations
inferred← citeshttps://doi.org/10.1109/ssiri.2009.8openalex-snapshot
On the Verification of Strong Atomicity in Programs Using STM
inferred← citeshttps://doi.org/10.1145/1062455.1062499openalex-snapshot
Data structure repair using goal-directed reasoning
inferred← citeshttps://doi.org/10.1145/1133255.1133983openalex-snapshot
The Atomos transactional programming language
inferred← citeshttps://doi.org/10.1145/1133255.1133985openalex-snapshot
Compiler and runtime support for efficient software transactional memory
inferred← citeshttps://doi.org/10.1145/1150019.1136491openalex-snapshot
Architectural Semantics for Practical Transactional Memory
inferred← citeshttps://doi.org/10.1145/1150019.1136506openalex-snapshot
Bulk Disambiguation of Speculative Threads in Multiprocessors
inferred← citeshttps://doi.org/10.1145/1152154.1152177openalex-snapshot
Testing implementations of transactional memory
inferred← citeshttps://doi.org/10.1145/1168857.1168901openalex-snapshot
Unbounded page-based transactional memory
inferred← citeshttps://doi.org/10.1145/1168857.1168903openalex-snapshot
Tradeoffs in transactional memory virtualization
inferred← citeshttps://doi.org/10.1145/1178597.1178611openalex-snapshot
Atomicity via source-to-source translation
inferred← citeshttps://doi.org/10.1145/1216919.1216936openalex-snapshot
A practical FPGA-based framework for novel CMP research
inferred← citeshttps://doi.org/10.1145/1229428.1229459openalex-snapshot
Optimized lock assignment and allocation
inferred← citeshttps://doi.org/10.1145/1233307.1233309openalex-snapshot
Concurrent programming without locks
inferred← citeshttps://doi.org/10.1145/1241601.1241611openalex-snapshot
A hardware/software framework for supporting transactional memory in a MPSoC environment
inferred← citeshttps://doi.org/10.1145/1250662.1250667openalex-snapshot
Making the fast case common and the uncommon case simple in unbounded transactional memory
inferred← citeshttps://doi.org/10.1145/1250662.1250674openalex-snapshot
Performance pathologies in hardware transactional memory
inferred← citeshttps://doi.org/10.1145/1250662.1250676openalex-snapshot
An integrated hardware-software approach to flexible transactional memory
inferred← citeshttps://doi.org/10.1145/1250734.1250744openalex-snapshot
Enforcing isolation and ordering in STM
inferred← citeshttps://doi.org/10.1145/1250734.1250759openalex-snapshot
Optimistic parallelism requires abstractions
inferred← citeshttps://doi.org/10.1145/1254810.1254814openalex-snapshot
Speculative optimization using hardware-monitored guarded regions for java virtual machines
inferred← citeshttps://doi.org/10.1145/1297027.1297080openalex-snapshot
The transactional memory / garbage collection analogy
inferred← citeshttps://doi.org/10.1145/1345206.1345232openalex-snapshot
Nested parallelism in transactional memory
inferred← citeshttps://doi.org/10.1145/1353522.1353527openalex-snapshot
The potential for variable-granularity access tracking for optimistic parallelism
inferred← citeshttps://doi.org/10.1145/1378533.1378564openalex-snapshot
Adaptive transaction scheduling for transactional memory systems
inferred← citeshttps://doi.org/10.1145/1378533.1378588openalex-snapshot
Practical weak-atomicity semantics for java stm
inferred← citeshttps://doi.org/10.1145/1394608.1382132openalex-snapshot
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
inferred← citeshttps://doi.org/10.1145/1394608.1382134openalex-snapshot
Flexible Decoupled Transactional Memory Support
inferred← citeshttps://doi.org/10.1145/1402227.1402235openalex-snapshot
Single global lock semantics in a weakly atomic STM
inferred← citeshttps://doi.org/10.1145/1454115.1454137openalex-snapshot
Scalable and reliable communication for hardware transactional memory
inferred← citeshttps://doi.org/10.1145/1531743.1531748openalex-snapshot
Extending concurrency of transactional memory programs by using value prediction
inferred← citeshttps://doi.org/10.1145/1542275.1542334openalex-snapshot
Limited early value communication to improve performance of transactional memory
inferred← citeshttps://doi.org/10.1145/1542452.1542465openalex-snapshot
Software transactional memory for multicore embedded systems
inferred← citeshttps://doi.org/10.1145/1542476.1542494openalex-snapshot
Stretching transactional memory
inferred← citeshttps://doi.org/10.1145/1924421.1924440openalex-snapshot
Why STM can be more than a research toy
inferred← citeshttps://doi.org/10.1145/2524211.2524216openalex-snapshot
Consistent, durable, and safe memory management for byte-addressable non volatile main memory
inferred← citeshttps://doi.org/10.17760/d20005070openalex-snapshot
Software transactional memory for multicore embedded systems
inferred← citeshttps://doi.org/10.32920/21463020openalex-snapshot
Introducing TAM: Time-Based Access Memory
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Introducing TAM: Time-Based Access Memory
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Research of Parallel Processing Technology Based on Multi-Core
inferred← citeshttps://doi.org/10.4230/dagsemproc.07361.3openalex-snapshot
A Case for Deconstructing Hardware Transactional Memory Systems
inferred← citeshttps://doi.org/10.5075/epfl-thesis-4541openalex-snapshot
Formalizing and verifying transactional memories
inferred← citeshttps://doi.org/10.5075/epfl-thesis-4874openalex-snapshot
Isolated Actors for Race-Free Concurrent Programming
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ATLAS: a chip-multiprocessor with transactional memory support
inferred← citeshttps://doi.org/10.5821/dissertation-2117-94452openalex-snapshot
Programming, debugging, profiling and optimizing transactional memory programs
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Architectural support for high-performing hardware transactional memory systems
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Enhancing the efficiency and practicality of software transactional memory on massively multithreaded systems
inferred← citeshttps://doi.org/10.5821/dissertation-2117-95388openalex-snapshot
Techniques for improving the performance of software transactional memory
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Distributed speculations: providing fault-tolerance and improving performance
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