On the public citation graph

TxLinux

https://doi.org/10.1145/1294261.1294271
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/11785477_8openalex-snapshot
Transparently Reconciling Transactions with Locking for Java Synchronization
inferredcites →https://doi.org/10.1016/j.scico.2005.03.005openalex-snapshot
Exceptions and side-effects in atomic blocks
inferredcites →https://doi.org/10.1016/j.scico.2006.05.010openalex-snapshot
Nested transactional memory: Model and architecture sketches
inferredcites →https://doi.org/10.1109/2.982916openalex-snapshot
Simics: A full system simulation platform
inferredcites →https://doi.org/10.1109/hpca.2003.1183520openalex-snapshot
Variability in architectural simulations of multi-threaded workloads
inferredcites →https://doi.org/10.1109/hpca.2005.41openalex-snapshot
Unbounded Transactional Memory
inferredcites →https://doi.org/10.1109/hpca.2006.1598134openalex-snapshot
LogTM: Log-based Transactional Memory
inferredcites →https://doi.org/10.1109/hpca.2007.346204openalex-snapshot
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
inferredcites →https://doi.org/10.1109/isca.2005.54openalex-snapshot
Virtualizing Transactional Memory
inferredcites →https://doi.org/10.1109/isca.2006.9openalex-snapshot
Architectural Semantics for Practical Transactional Memory
inferredcites →https://doi.org/10.1109/micro.2006.9openalex-snapshot
Architectural Support for Software Transactional Memory
inferredcites →https://doi.org/10.1109/mm.2006.26openalex-snapshot
Unbounded Transactional Memory
inferredcites →https://doi.org/10.1109/real.2003.1253271openalex-snapshot
Hardware support for priority inheritance
inferredcites →https://doi.org/10.1145/1028176.1006711openalex-snapshot
Transactional Memory Coherence and Consistency
inferredcites →https://doi.org/10.1145/1065944.1065952openalex-snapshot
Composable memory transactions
inferredcites →https://doi.org/10.1145/1073814.1073861openalex-snapshot
Advanced contention management for dynamic software transactional memory
inferredcites →https://doi.org/10.1145/1080695.1070011openalex-snapshot
Virtualizing Transactional Memory
inferredcites →https://doi.org/10.1145/1095408.1095421openalex-snapshot
Software and the Concurrency Revolution
inferredcites →https://doi.org/10.1145/1122971.1123003openalex-snapshot
Hybrid transactional memory
inferredcites →https://doi.org/10.1145/1133255.1133983openalex-snapshot
The Atomos transactional programming language
inferredcites →https://doi.org/10.1145/1133255.1133985openalex-snapshot
Compiler and runtime support for efficient software transactional memory
inferredcites →https://doi.org/10.1145/1133981.1133983openalex-snapshot
The Atomos transactional programming language
inferredcites →https://doi.org/10.1145/1133981.1133985openalex-snapshot
Compiler and runtime support for efficient software transactional memory
inferredcites →https://doi.org/10.1145/114005.102808openalex-snapshot
Wait-free synchronization
inferredcites →https://doi.org/10.1145/1150019.1136491openalex-snapshot
Architectural Semantics for Practical Transactional Memory
inferredcites →https://doi.org/10.1145/1165389.945468openalex-snapshot
RacerX
inferredcites →https://doi.org/10.1145/1168857.1168900openalex-snapshot
Hybrid transactional memory
inferredcites →https://doi.org/10.1145/1168857.1168901openalex-snapshot
Unbounded page-based transactional memory
inferredcites →https://doi.org/10.1145/1168857.1168902openalex-snapshot
Supporting nested transactional memory in logTM
inferredcites →https://doi.org/10.1145/1168857.1168903openalex-snapshot
Tradeoffs in transactional memory virtualization
inferredcites →https://doi.org/10.1145/1168918.1168901openalex-snapshot
Unbounded page-based transactional memory
inferredcites →https://doi.org/10.1145/1250662.1250667openalex-snapshot
Making the fast case common and the uncommon case simple in unbounded transactional memory
inferredcites →https://doi.org/10.1145/1250662.1250675openalex-snapshot
MetaTM/TxLinux
inferredcites →https://doi.org/10.1145/142111.993246openalex-snapshot
A Lock-Free Multiprocessor OS Kernel
inferredcites →https://doi.org/10.1145/165123.165164openalex-snapshot
Transactional memory
inferredcites →https://doi.org/10.1145/16856.16862openalex-snapshot
Abstraction in recovery management
inferredcites →https://doi.org/10.1145/238721.238767openalex-snapshot
The synergy between non-blocking synchronization and operating system structure
inferredcites →https://doi.org/10.1145/319566.319567openalex-snapshot
On optimistic methods for concurrency control
inferredcites →https://doi.org/10.1145/359863.359878openalex-snapshot
Concurrent reading and writing
inferredcites →https://doi.org/10.1145/363095.363144openalex-snapshot
A scheduling philosophy for multiprocessing systems
inferredcites →https://doi.org/10.1145/502034.502042openalex-snapshot
An empirical study of operating systems errors
inferredcites →https://doi.org/10.1145/568522.568525openalex-snapshot
A survey of rollback-recovery protocols in message-passing systems
inferredcites →https://doi.org/10.1145/605397.605399openalex-snapshot
Transactional lock-free execution of lock-based programs
inferredcites →https://doi.org/10.1145/74850.74866openalex-snapshot
Process control and scheduling issues for multiprogrammed shared-memory multiprocessors
inferredcites →https://doi.org/10.1145/74851.74866openalex-snapshot
Process control and scheduling issues for multiprogrammed shared-memory multiprocessors
inferredcites →https://doi.org/10.1145/945445.945468openalex-snapshot
RacerX
inferredcites →https://doi.org/10.5555/563998.564036openalex-snapshot
Speculative lock elision: enabling highly concurrent multithreaded execution

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/cpe.2983openalex-snapshot
Towards scalability collapse behavior on multicores
inferred← citeshttps://doi.org/10.1007/978-3-030-52794-5_8openalex-snapshot
Investigating Transactional Memory for High Performance Embedded Systems
inferred← citeshttps://doi.org/10.1007/978-3-642-11659-9_1openalex-snapshot
Transactional Memory Today
inferred← citeshttps://doi.org/10.1007/978-3-642-19853-3_58openalex-snapshot
A Comprehensive Scheme for Contention Management in Hardware Transactional Memory
inferred← citeshttps://doi.org/10.1007/978-3-642-36036-7_9openalex-snapshot
Optimizing the Concurrent Execution of Locks and Transactions
inferred← citeshttps://doi.org/10.1007/978-3-662-48096-0_30openalex-snapshot
A Practical Transactional Memory Interface
inferred← citeshttps://doi.org/10.1007/s00224-013-9452-5openalex-snapshot
Software Engineering with Transactional Memory Versus Locks in Practice
inferred← citeshttps://doi.org/10.1016/j.jpdc.2010.02.006openalex-snapshot
Adaptive locks: Combining transactions and locks for efficient concurrency
inferred← citeshttps://doi.org/10.1109/access.2021.3077539openalex-snapshot
Migration in Hardware Transactional Memory on Asymmetric Multiprocessor
inferred← citeshttps://doi.org/10.1109/csnt.2014.78openalex-snapshot
Contention Management Policy in Software Transactional Memory in Parallel and Distributed Systems
inferred← citeshttps://doi.org/10.1109/dsn.2011.5958224openalex-snapshot
Deadline-aware scheduling for Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/hpca.2013.6522346openalex-snapshot
In-network traffic regulation for Transactional Memory
inferred← citeshttps://doi.org/10.1109/hpca.2018.00029openalex-snapshot
High-Performance GPU Transactional Memory via Eager Conflict Detection
inferred← citeshttps://doi.org/10.1109/icpads.2010.31openalex-snapshot
A Scheduling Method for Avoiding Kernel Lock Thrashing on Multi-cores
inferred← citeshttps://doi.org/10.1109/ipdps.2009.5161006openalex-snapshot
Using hardware transactional memory for data race detection
inferred← citeshttps://doi.org/10.1109/ipdps.2013.45openalex-snapshot
TM-dietlibc: A TM-aware Real-World System Library
inferred← citeshttps://doi.org/10.1109/ipdps.2016.104openalex-snapshot
Markov Chain-Based Adaptive Scheduling in Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/isca.2008.34openalex-snapshot
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
inferred← citeshttps://doi.org/10.1109/ispass.2010.5452061openalex-snapshot
Understanding transactional memory performance
inferred← citeshttps://doi.org/10.1109/l-ca.2011.6openalex-snapshot
GCMS: A Global Contention Management Scheme in Hardware Transactional Memory
inferred← citeshttps://doi.org/10.1109/mascots.2012.42openalex-snapshot
Reducing Scalability Collapse via Requester-Based Locking on Multicore Systems
inferred← citeshttps://doi.org/10.1109/micro.2008.4771794openalex-snapshot
Notary: Hardware techniques to enhance signatures
inferred← citeshttps://doi.org/10.1109/micro.2008.4771795openalex-snapshot
Dependence-aware transactional memory for increased concurrency
inferred← citeshttps://doi.org/10.1109/micro.2018.00026openalex-snapshot
Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism
inferred← citeshttps://doi.org/10.1109/mm.2008.10openalex-snapshot
MetaTM/TxLinux: Transactional Memory for an Operating System
inferred← citeshttps://doi.org/10.1109/pact.2009.20openalex-snapshot
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
inferred← citeshttps://doi.org/10.1109/pdcat.2008.77openalex-snapshot
Exploring the Emerging Applications for Transactional Memory
inferred← citeshttps://doi.org/10.1109/rtcsa.2012.32openalex-snapshot
Using Virtual CPU Migration to Solve the Lock Holder Preemption Problem in a Multicore Processor-Based Virtualization Layer for Embedded Systems
inferred← citeshttps://doi.org/10.1109/tc.2013.196openalex-snapshot
Requester-Based Spin Lock: A Scalable and Energy Efficient Locking Scheme on Multicore Systems
inferred← citeshttps://doi.org/10.1109/tpds.2018.2877656openalex-snapshot
Applying Transactional Memory for Concurrency-Bug Failure Recovery in Production Runs
inferred← citeshttps://doi.org/10.1145/1378533.1378551openalex-snapshot
RaceTM
inferred← citeshttps://doi.org/10.1145/1378533.1378584openalex-snapshot
Irrevocable transactions and their applications
inferred← citeshttps://doi.org/10.1145/1378727.1378747openalex-snapshot
TxLinux and MetaTM
inferred← citeshttps://doi.org/10.1145/1388240.1388257openalex-snapshot
Distributed computing in SOSP and OSDI
inferred← citeshttps://doi.org/10.1145/1394608.1382132openalex-snapshot
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
inferred← citeshttps://doi.org/10.1145/1400097.1400099openalex-snapshot
Introducing technology into the Linux kernel
inferred← citeshttps://doi.org/10.1145/1400751.1400769openalex-snapshot
CAR-STM
inferred← citeshttps://doi.org/10.1145/1449764.1449778openalex-snapshot
Contention-aware scheduler
inferred← citeshttps://doi.org/10.1145/1449955.1449778openalex-snapshot
Contention-aware scheduler
inferred← citeshttps://doi.org/10.1145/1455770.1455800openalex-snapshot
Enforcing authorization policies using transactional memory introspection
inferred← citeshttps://doi.org/10.1145/1508244.1508251openalex-snapshot
Recovery domains
inferred← citeshttps://doi.org/10.1145/1508244.1508262openalex-snapshot
Maximum benefit from a minimal HTM
inferred← citeshttps://doi.org/10.1145/1508244.1508274openalex-snapshot
Accelerating critical section execution with asymmetric multi-core architectures
inferred← citeshttps://doi.org/10.1145/1508284.1508251openalex-snapshot
Recovery domains
inferred← citeshttps://doi.org/10.1145/1508284.1508262openalex-snapshot
Maximum benefit from a minimal HTM
inferred← citeshttps://doi.org/10.1145/1508284.1508274openalex-snapshot
Accelerating critical section execution with asymmetric multi-core architectures
inferred← citeshttps://doi.org/10.1145/1519065.1519093openalex-snapshot
xCalls
inferred← citeshttps://doi.org/10.1145/1519065.1519094openalex-snapshot
A runtime system for software lock elision
inferred← citeshttps://doi.org/10.1145/1565824.1565826openalex-snapshot
An efficient lock-aware transactional memory implementation
inferred← citeshttps://doi.org/10.1145/1582716.1582725openalex-snapshot
Preventing versus curing
inferred← citeshttps://doi.org/10.1145/1629575.1629591openalex-snapshot
Operating System Transactions
inferred← citeshttps://doi.org/10.1145/1669112.1669131openalex-snapshot
BulkCompiler
inferred← citeshttps://doi.org/10.1145/1669112.1669133openalex-snapshot
Proactive transaction scheduling for contention management
inferred← citeshttps://doi.org/10.1145/1693453.1693465openalex-snapshot
Scheduling support for transactional memory contention management
inferred← citeshttps://doi.org/10.1145/1810479.1810537openalex-snapshot
Simplifying concurrent algorithms by exploiting hardware transactional memory
inferred← citeshttps://doi.org/10.1145/1837853.1693465openalex-snapshot
Scheduling support for transactional memory contention management
inferred← citeshttps://doi.org/10.1145/1842733.1842750openalex-snapshot
Scalable concurrent hash tables via relativistic programming
inferred← citeshttps://doi.org/10.1145/1924421.1924440openalex-snapshot
Why STM can be more than a research toy
inferred← citeshttps://doi.org/10.1145/1989493.1989500openalex-snapshot
A study of transactional memory vs. locks in practice
inferred← citeshttps://doi.org/10.1145/1996029.1996033openalex-snapshot
Comparison of lock thrashing avoidance methods and its performance implications for lock design
inferred← citeshttps://doi.org/10.1145/2150976.2150999openalex-snapshot
Applying transactional memory to concurrency bugs
inferred← citeshttps://doi.org/10.1145/2155620.2155645openalex-snapshot
ATDetector
inferred← citeshttps://doi.org/10.1145/2189750.2150999openalex-snapshot
Applying transactional memory to concurrency bugs
inferred← citeshttps://doi.org/10.1145/2248487.2150999openalex-snapshot
Applying transactional memory to concurrency bugs
inferred← citeshttps://doi.org/10.1145/2400682.2400703openalex-snapshot
Lock-contention-aware scheduler
inferred← citeshttps://doi.org/10.1145/2451116.2451168openalex-snapshot
Fine-grained fault tolerance using device checkpoints
inferred← citeshttps://doi.org/10.1145/2490301.2451168openalex-snapshot
Fine-grained fault tolerance using device checkpoints
inferred← citeshttps://doi.org/10.1145/2499368.2451168openalex-snapshot
Fine-grained fault tolerance using device checkpoints
inferred← citeshttps://doi.org/10.1145/2528521.1508251openalex-snapshot
Recovery domains
inferred← citeshttps://doi.org/10.1145/2528521.1508262openalex-snapshot
Maximum benefit from a minimal HTM
inferred← citeshttps://doi.org/10.1145/2528521.1508274openalex-snapshot
Accelerating critical section execution with asymmetric multi-core architectures
inferred← citeshttps://doi.org/10.1145/2755573.2755578openalex-snapshot
Seer
inferred← citeshttps://doi.org/10.1145/2797022.2797042openalex-snapshot
For a Microkernel, a Big Lock Is Fine
inferred← citeshttps://doi.org/10.1145/2837028openalex-snapshot
A Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction Execution
inferred← citeshttps://doi.org/10.1145/2872362.2872369openalex-snapshot
CSR
inferred← citeshttps://doi.org/10.1145/2954679.2872369openalex-snapshot
CSR
inferred← citeshttps://doi.org/10.1145/2954680.2872369openalex-snapshot
CSR
inferred← citeshttps://doi.org/10.1145/2967938.2967955openalex-snapshot
EXCITE-VM
inferred← citeshttps://doi.org/10.1145/2980024.2872369openalex-snapshot
CSR
inferred← citeshttps://doi.org/10.1145/3132036openalex-snapshot
Seer
inferred← citeshttps://doi.org/10.1145/3342195.3387527openalex-snapshot
An HTM-based update-side synchronization for RCU on NUMA systems
inferred← citeshttps://doi.org/10.15760/etd.114openalex-snapshot
Extending Relativistic Programming to Multiple Writers
inferred← citeshttps://doi.org/10.15760/etd.497openalex-snapshot
Relativistic Causal Ordering A Memory Model for Scalable Concurrent Data Structures
inferred← citeshttps://doi.org/10.17863/cam.16366openalex-snapshot
Software lock elision for x86 machine code
inferred← citeshttps://doi.org/10.2200/s00093ed1v01y200707cac003openalex-snapshot
Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency
inferred← citeshttps://doi.org/10.2200/s00272ed1v01y201006cac011openalex-snapshot
Transactional Memory, 2nd edition
inferred← citeshttps://doi.org/10.48550/arxiv.1609.08372openalex-snapshot
An Evaluation of Coarse-Grained Locking for Multicore Microkernels
inferred← citeshttps://doi.org/10.5075/epfl-thesis-5386openalex-snapshot
On the Performance of Software Transactional Memory
inferred← citeshttps://doi.org/10.5445/ir/1000012980openalex-snapshot
Does Transactional Memory Keep Its Promises? Results from an Empirical Study
inferred← citeshttps://doi.org/10.5445/ir/1000035636openalex-snapshot
Performance Optimization Strategies for Transactional Memory Applications
inferred← citeshttps://doi.org/10.5821/dissertation-2117-94452openalex-snapshot
Programming, debugging, profiling and optimizing transactional memory programs
inferred← citeshttps://doi.org/10.70675/a058c154zcac2z4a1dz9ce8z9dc8c8582a0fopenalex-snapshot
Optimisation de la performance des applications de mémoire transactionnelle sur des plates-formes multicoeurs : une approche basée sur l'apprentissage automatique
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