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Design Comparison to Identify Malicious Hardware in External Intellectual Property

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/spe.4380090307openalex-snapshot
Unrolling loops in fortran
inferredcites →https://doi.org/10.1007/978-1-4615-3190-6openalex-snapshot
Symbolic Model Checking
inferredcites →https://doi.org/10.1080/1065514021000012273openalex-snapshot
A New Characterization Method for Delay and Power Dissipation of Standard Library Cells
inferredcites →https://doi.org/10.1109/2.955100openalex-snapshot
Building the IBM 4758 secure coprocessor
inferredcites →https://doi.org/10.1109/43.945306openalex-snapshot
Techniques for the creation of digital watermarks in sequential circuit designs
inferredcites →https://doi.org/10.1109/date.2008.4484928openalex-snapshot
Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme
inferredcites →https://doi.org/10.1109/dft.2008.61openalex-snapshot
Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis
inferredcites →https://doi.org/10.1109/hst.2008.4559037openalex-snapshot
Sensitivity analysis to hardware Trojans using power supply transient signals
inferredcites →https://doi.org/10.1109/hst.2008.4559038openalex-snapshot
At-speed delay characterization for IC authentication and Trojan Horse detection
inferredcites →https://doi.org/10.1109/hst.2008.4559039openalex-snapshot
Detecting malicious inclusions in secure hardware: Challenges and solutions
inferredcites →https://doi.org/10.1109/hst.2008.4559047openalex-snapshot
A region based approach for the identification of hardware Trojans
inferredcites →https://doi.org/10.1109/hst.2008.4559049openalex-snapshot
Hardware Trojan detection using path delay fingerprint
inferredcites →https://doi.org/10.1109/hst.2009.5224966openalex-snapshot
Performance of delay-based Trojan detection techniques under parameter variations
inferredcites →https://doi.org/10.1109/iccd.2011.6081412openalex-snapshot
Hardware Trojans: The defense and attack of integrated circuits
inferredcites →https://doi.org/10.1109/jproc.1998.658762openalex-snapshot
Cramming More Components Onto Integrated Circuits
inferredcites →https://doi.org/10.1109/mc.2010.284openalex-snapshot
Ending Piracy of Integrated Circuits
inferredcites →https://doi.org/10.1109/mc.2010.299openalex-snapshot
Trustworthy Hardware: Identifying and Classifying Hardware Trojans
inferredcites →https://doi.org/10.1109/mspec.2008.4505310openalex-snapshot
The Hunt For The Kill Switch
inferredcites →https://doi.org/10.1109/sp.2007.36openalex-snapshot
Trojan Detection using IC Fingerprinting
inferredcites →https://doi.org/10.1109/vlsi.design.2009.22openalex-snapshot
A Novel Sustained Vector Technique for the Detection of Hardware Trojans
inferredcites →https://doi.org/10.1109/vts.2011.5783766openalex-snapshot
Design and analysis of ring oscillator based Design-for-Trust technique
inferredcites →https://doi.org/10.1145/1403375.1403703openalex-snapshot
Towards trojan-free trusted ICs
inferredcites →https://doi.org/10.1145/800157.805047openalex-snapshot
The complexity of theorem-proving procedures
inferredcites →https://doi.org/10.1145/996566.996771openalex-snapshot
Security as a new dimension in embedded system design

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/cta.3098openalex-snapshot
Hardware Trojan detection for lightweight ciphers implemented on field‐programmable gate arrays using the replay algorithm
inferred← citeshttps://doi.org/10.1007/978-3-030-47218-4_4openalex-snapshot
Hardware Trojans in Microcircuits
inferred← citeshttps://doi.org/10.1007/978-3-319-68511-3_2openalex-snapshot
Introduction to Hardware Trojans
inferred← citeshttps://doi.org/10.1016/b978-0-12-812477-2.00010-1openalex-snapshot
Hardware Trojans
inferred← citeshttps://doi.org/10.1016/b978-0-12-812477-2.00018-6openalex-snapshot
Security and Trust Assessment, and Design for Security
inferred← citeshttps://doi.org/10.1016/b978-0-44-318754-4.00014-4openalex-snapshot
Hardware Trojans
inferred← citeshttps://doi.org/10.1016/j.vlsi.2016.01.004openalex-snapshot
A survey of hardware Trojan threat and defense
inferred← citeshttps://doi.org/10.1049/iet-cdt.2018.5101openalex-snapshot
Signal word‐level statistical properties‐based activation approach for hardware Trojan detection in DSP circuits
inferred← citeshttps://doi.org/10.1109/access.2018.2790392openalex-snapshot
Security-Aware Task Scheduling Using Untrusted Components in High-Level Synthesis
inferred← citeshttps://doi.org/10.1109/cadgraphics.2015.41openalex-snapshot
A Survey of Hardware Trojan Detection, Diagnosis and Prevention
inferred← citeshttps://doi.org/10.1109/iccd.2012.6378631openalex-snapshot
Stealth assessment of hardware Trojans in a microcontroller
inferred← citeshttps://doi.org/10.1109/ims3tw.2016.7524239openalex-snapshot
Security aspects of analog and mixed-signal circuits
inferred← citeshttps://doi.org/10.1109/jproc.2014.2334493openalex-snapshot
Hardware Trojan Attacks: Threat Analysis and Countermeasures
inferred← citeshttps://doi.org/10.1109/secon.2016.7506737openalex-snapshot
Golden Reference Library Matching of Structural Checking for securing soft IPs
inferred← citeshttps://doi.org/10.1109/tcad.2015.2459038openalex-snapshot
Detection of Hardware Trojans in Third-Party Intellectual Property Using Untrusted Modules
inferred← citeshttps://doi.org/10.1109/tcad.2021.3073855openalex-snapshot
A Novel Algorithm for Hardware Trojan Detection Through Reverse Engineering
inferred← citeshttps://doi.org/10.1109/tdsc.2019.2961902openalex-snapshot
Run-Time Monitoring and Validation Using Reverse Function (RMVRF) for Hardware Trojans Detection
inferred← citeshttps://doi.org/10.1109/tetc.2013.2287186openalex-snapshot
Fabrication Attacks: Zero-Overhead Malicious Modifications Enabling Modern Microprocessor Privilege Escalation
inferred← citeshttps://doi.org/10.1109/ths.2012.6459818openalex-snapshot
Ensuring trust of third-party hardware design with constrained sequential equivalence checking
inferred← citeshttps://doi.org/10.1109/vlsid57277.2023.00074openalex-snapshot
SANNA: Secure Acceleration of Neural Network Applications
inferred← citeshttps://doi.org/10.1145/2645791.2645818openalex-snapshot
Stealth Assessment of Hardware Trojans in simple Processors
inferred← citeshttps://doi.org/10.1145/2906147openalex-snapshot
Hardware Trojans
inferred← citeshttps://doi.org/10.1155/2021/8839222openalex-snapshot
Process Variation-Resistant Golden-Free Hardware Trojan Detection through a Power Side Channel
inferred← citeshttps://doi.org/10.1587/elex.19.20220167openalex-snapshot
A multi-level architecture for hardware Trojan and vulnerability runtime detection and response towards cryptographic IP
inferred← citeshttps://doi.org/10.48550/arxiv.1908.06757openalex-snapshot
Boosting the Bounds of Symbolic QED for Effective Pre-Silicon Verification of Processor Cores
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