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Dynamic MIPS Rate Stabilization for Complex Processors

https://doi.org/10.1145/2714575
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-45046-7openalex-snapshot
Reflection and Software Engineering
inferredcites →https://doi.org/10.1007/978-3-540-39707-6_6openalex-snapshot
Improving Memory Latency Aware Fetch Policies for SMT Processors
inferredcites →https://doi.org/10.1007/978-3-540-78153-0_13openalex-snapshot
A Predictable Simultaneous Multithreading Scheme for Hard Real-Time
inferredcites →https://doi.org/10.1007/978-3-642-11950-7_2openalex-snapshot
How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT
inferredcites →https://doi.org/10.1108/ir.1999.04926fae.001openalex-snapshot
Lecture Notes in Computer Science 1205
inferredcites →https://doi.org/10.1109/92.845896openalex-snapshot
A survey of design techniques for system-level dynamic power management
inferredcites →https://doi.org/10.1109/emrts.2004.1310981openalex-snapshot
Proceedings 16th Euromicro Conference on Real-Time Systems (ECRTS 2004)
inferredcites →https://doi.org/10.1109/hpca.2002.995695openalex-snapshot
Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management
inferredcites →https://doi.org/10.1109/iccd.2008.4751887openalex-snapshot
Exploiting spare resources of in-order SMT processors executing hard real-time threads
inferredcites →https://doi.org/10.1109/ipdps.2001.924929openalex-snapshot
Boosting SMT performance by speculation control
inferredcites →https://doi.org/10.1109/micro.2004.17openalex-snapshot
Dynamically Controlled Resource Allocation in SMT Processors
inferredcites →https://doi.org/10.1109/micro.2004.18openalex-snapshot
Dynamically Trading Frequency for Complexity in a GALS Microprocessor
inferredcites →https://doi.org/10.1109/real.2002.1181569openalex-snapshot
Soft real-time scheduling on simultaneous multithreaded processors
inferredcites →https://doi.org/10.1109/rtas.2007.28openalex-snapshot
Prioritized SMT Architecture with IPC Control Method for Real-Time Processing
inferredcites →https://doi.org/10.1109/rttas.2004.1317252openalex-snapshot
Feedback EDF scheduling exploiting dynamic voltage scaling
inferredcites →https://doi.org/10.1109/vlsit.2004.1345387openalex-snapshot
Delaying forever: Uniaxial strained silicon transistors in a 90nm CMOS technology
inferredcites →https://doi.org/10.1109/wwc.2001.15openalex-snapshot
MiBench: A free, commercially representative embedded benchmark suite
inferredcites →https://doi.org/10.1145/1086297.1086320openalex-snapshot
Architectural support for real-time task scheduling in SMT processors
inferredcites →https://doi.org/10.1145/1210268.1210272openalex-snapshot
The XTREM power and performance simulator for the Intel XScale core
inferredcites →https://doi.org/10.1145/1210268.1210275openalex-snapshot
Timing analysis for preemptive multitasking real-time systems with caches
inferredcites →https://doi.org/10.1145/1241601.1241609openalex-snapshot
Improving fairness, throughput and energy-efficiency on a chip multiprocessor through DVFS
inferredcites →https://doi.org/10.1145/1287624.1287702openalex-snapshot
A profile-driven statistical analysis framework for the design optimization of soft real-time applications
inferredcites →https://doi.org/10.1145/1555754.1555763openalex-snapshot
Dynamic MIPS rate stabilization in out-of-order processors
inferredcites →https://doi.org/10.1145/1669112.1669172openalex-snapshot
McPAT
inferredcites →https://doi.org/10.1145/232973.232993openalex-snapshot
Exploiting choice
inferredcites →https://doi.org/10.1145/232974.232993openalex-snapshot
Exploiting choice
inferredcites →https://doi.org/10.1145/343647.343846openalex-snapshot
Static timing analysis of embedded software on advanced processor architectures
inferredcites →https://doi.org/10.1145/379240.379270openalex-snapshot
Variability in the execution of multimedia applications and implications for architecture
inferredcites →https://doi.org/10.1145/545214.545233openalex-snapshot
Power and performance evaluation of globally asynchronous locally synchronous processors
inferredcites →https://doi.org/10.1145/605397.605403openalex-snapshot
Automatically characterizing large scale program behavior
inferredcites →https://doi.org/10.1145/635506.605403openalex-snapshot
Automatically characterizing large scale program behavior
inferredcites →https://doi.org/10.1145/951710.951744openalex-snapshot
A control-theoretic approach to dynamic voltage scheduling
inferredcites →https://doi.org/10.5555/563998.564004openalex-snapshot
Using variable-MHz microprocessors to efficiently handle uncertainty in real-time systems
inferredcites →https://doi.org/10.5555/563998.564031openalex-snapshot
Saving energy with architectural and frequency adaptations for multimedia applications
inferredcites →https://doi.org/10.5555/563998.564038openalex-snapshot
Handling long-latency loads in a simultaneous multithreading processor

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/j.future.2026.108527openalex-snapshot
Energy-efficient workflow task scheduling with deadline and budget constraints on DVFS-enabled cloud systems
inferred← citeshttps://doi.org/10.1016/j.jpdc.2020.05.006openalex-snapshot
Coordinated management of DVFS and cache partitioning under QoS constraints to save energy in multi-core systems
inferred← citeshttps://doi.org/10.1109/ipdps.2019.00040openalex-snapshot
QoS-Driven Coordinated Management of Resources to Save Energy in Multi-core Systems
inferred← citeshttps://doi.org/10.1109/ipdps47924.2020.00067openalex-snapshot
Coordinated Management of Processor Configuration and Cache Partitioning to Optimize Energy under QoS Constraints
inferred← citeshttps://doi.org/10.1145/3148053openalex-snapshot
SLOOP
inferred← citeshttps://doi.org/10.1145/3337821.3337865openalex-snapshot
SaC
inferred← citeshttps://doi.org/10.1145/3407904openalex-snapshot
Approximate Cache in GPGPUs
inferred← citeshttps://doi.org/10.1145/3494537openalex-snapshot
Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints
inferred← citeshttps://doi.org/10.1145/3505559openalex-snapshot
Cooperative Slack Management: Saving Energy of Multicore Processors by Trading Performance Slack Between QoS-Constrained Applications
inferred← citeshttps://doi.org/10.1145/3587135.3592207openalex-snapshot
ARADA
inferred← citeshttps://doi.org/10.1145/3605214openalex-snapshot
Approx-RM: Reducing Energy on Heterogeneous Multicore Processors under Accuracy and Timing Constraints
inferred← citeshttps://doi.org/10.1587/nolta.16.622openalex-snapshot
SIA: A Stackelberg-induced Actor-Critic framework for optimized cloud infrastructure scheduling
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