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Automatic Vectorization of Interleaved Data Revisited

https://doi.org/10.1145/2838735
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-1-4612-5192-7openalex-snapshot
Compiler Construction
inferredcites →https://doi.org/10.1007/978-3-319-06486-4_7openalex-snapshot
Intel Math Kernel Library
inferredcites →https://doi.org/10.1007/978-3-540-27866-5_38openalex-snapshot
A Polyhedral Approach to Ease the Composition of Program Transformations
inferredcites →https://doi.org/10.1007/978-3-540-71229-9_1openalex-snapshot
New Algorithms for SIMD Alignment
inferredcites →https://doi.org/10.1007/978-3-540-78791-4_8openalex-snapshot
Generating SIMD Vectorized Permutations
inferredcites →https://doi.org/10.1016/0096-0551(90)90006-bopenalex-snapshot
Efficient retargetable code generation using bottom-up tree pattern matching
inferredcites →https://doi.org/10.1016/s0167-8191(00)00087-9openalex-snapshot
Automated empirical optimizations of software and the ATLAS project
inferredcites →https://doi.org/10.1109/40.372347openalex-snapshot
Accelerating multimedia with enhanced microprocessors
inferredcites →https://doi.org/10.1109/cgo.2005.33openalex-snapshot
Superword-Level Parallelism in the Presence of Control Flow
inferredcites →https://doi.org/10.1109/cgo.2011.5764682openalex-snapshot
Whole-function vectorization
inferredcites →https://doi.org/10.1109/ipdps.2002.1015494openalex-snapshot
A SIMD vectorizing compiler for digital signal processing algorithms
inferredcites →https://doi.org/10.1109/micro.2010.38openalex-snapshot
Efficient Selection of Vector Instructions Using Dynamic Programming
inferredcites →https://doi.org/10.1109/pact.2011.68openalex-snapshot
An Evaluation of Vectorizing Compilers
inferredcites →https://doi.org/10.1109/tc.2003.1223637openalex-snapshot
Bottlenecks in multimedia processing with SIMD style extensions and architectural enhancements
inferredcites →https://doi.org/10.1145/1065910.1065931openalex-snapshot
Generation of permutations for SIMD processors
inferredcites →https://doi.org/10.1145/1070891.1065931openalex-snapshot
Generation of permutations for SIMD processors
inferredcites →https://doi.org/10.1145/1133255.1133996openalex-snapshot
Optimizing data permutations for SIMD devices
inferredcites →https://doi.org/10.1145/1133255.1133997openalex-snapshot
Auto-vectorization of interleaved data for SIMD
inferredcites →https://doi.org/10.1145/1133981.1133997openalex-snapshot
Auto-vectorization of interleaved data for SIMD
inferredcites →https://doi.org/10.1145/131080.131089openalex-snapshot
BURG
inferredcites →https://doi.org/10.1145/2150976.2151014openalex-snapshot
SIMD defragmenter
inferredcites →https://doi.org/10.1145/2189750.2151014openalex-snapshot
SIMD defragmenter
inferredcites →https://doi.org/10.1145/2254064.2254106openalex-snapshot
A compiler framework for extracting superword level parallelism
inferredcites →https://doi.org/10.1145/2345156.2254106openalex-snapshot
A compiler framework for extracting superword level parallelism
inferredcites →https://doi.org/10.1145/2687355openalex-snapshot
The Impact of the SIMD Width on Control-Flow and Memory Divergence
inferredcites →https://doi.org/10.1145/349299.349320openalex-snapshot
Exploiting superword level parallelism with multimedia instruction sets
inferredcites →https://doi.org/10.1145/355841.355847openalex-snapshot
Basic Linear Algebra Subprograms for Fortran Usage
inferredcites →https://doi.org/10.1145/358438.349320openalex-snapshot
Exploiting superword level parallelism with multimedia instruction sets
inferredcites →https://doi.org/10.1145/69558.75700openalex-snapshot
Code generation using tree matching and dynamic programming
inferredcites →https://doi.org/10.1145/996841.996853openalex-snapshot
Vectorization for SIMD architectures with alignment constraints
inferredcites →https://doi.org/10.1201/chdismthappopenalex-snapshot
Discrete Mathematics and Its Applications

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/spe.2573openalex-snapshot
Efficient and retargetable SIMD translation in a dynamic binary translator
inferred← citeshttps://doi.org/10.1007/978-3-030-72789-5_2openalex-snapshot
PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code
inferred← citeshttps://doi.org/10.1016/j.sysarc.2019.07.008openalex-snapshot
Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translator
inferred← citeshttps://doi.org/10.1109/cgo.2019.8661192openalex-snapshot
Super-Node SLP: Optimized Vectorization for Code Sequences Containing Operators and Their Inverse Elements
inferred← citeshttps://doi.org/10.1109/llvm-hpc.2018.8639483openalex-snapshot
Function/Kernel Vectorization via Loop Vectorizer
inferred← citeshttps://doi.org/10.1109/tc.2017.2716355openalex-snapshot
Efficient Multibyte Floating Point Data Formats Using Vectorization
inferred← citeshttps://doi.org/10.1145/2967938.2967966openalex-snapshot
Vectorization of Multibyte Floating Point Data Formats
inferred← citeshttps://doi.org/10.1145/3078633.3081029openalex-snapshot
Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions
inferred← citeshttps://doi.org/10.1145/3123939.3124554openalex-snapshot
Improving the effectiveness of searching for isomorphic chains in superword level parallelism
inferred← citeshttps://doi.org/10.1145/3140582.3081029openalex-snapshot
Dynamic translation of structured Loads/Stores and register mapping for architectures with SIMD extensions
inferred← citeshttps://doi.org/10.1145/3168808openalex-snapshot
Poker: permutation-based SIMD execution of intensive tree search by path encoding
inferred← citeshttps://doi.org/10.1145/3243176.3243189openalex-snapshot
VW-SLP
inferred← citeshttps://doi.org/10.1145/3280850openalex-snapshot
P oker
inferred← citeshttps://doi.org/10.1145/3377555.3377890openalex-snapshot
Vectorization-aware loop unrolling with seed forwarding
inferred← citeshttps://doi.org/10.1145/3458357openalex-snapshot
Flynn’s Reconciliation
inferred← citeshttps://doi.org/10.1145/3497776.3517767openalex-snapshot
Loner: utilizing the CPU vector datapath to process scalar integer data
inferred← citeshttps://doi.org/10.1145/3545008.3545042openalex-snapshot
Vectorizing SpMV by Exploiting Dynamic Regular Patterns
inferred← citeshttps://doi.org/10.1145/3631709openalex-snapshot
Autovesk: Automatic Vectorized Code Generation from Unstructured Static Kernels Using Graph Transformations
inferred← citeshttps://doi.org/10.1145/3716874openalex-snapshot
Exploiting Dynamic Regular Patterns in Irregular Programs for Efficient Vectorization
inferred← citeshttps://doi.org/10.1155/2021/3264624openalex-snapshot
Evaluation of Compilers’ Capability of Automatic Vectorization Based on Source Code Analysis
inferred← citeshttps://doi.org/10.5555/3314872.3314897openalex-snapshot
Super-Node SLP: optimized vectorization for code sequences containing operators and their inverse elements
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