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Analytical Modeling Is Enough for High-Performance BLIS

https://doi.org/10.1145/2925987
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/s11227-014-1098-9openalex-snapshot
A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD
inferredcites →https://doi.org/10.1016/s0167-8191(00)00086-7openalex-snapshot
New trends in high performance computing
inferredcites →https://doi.org/10.1016/s0167-8191(00)00087-9openalex-snapshot
Automated empirical optimizations of software and the ATLAS project
inferredcites →https://doi.org/10.1109/ipdps.2014.110openalex-snapshot
Anatomy of High-Performance Many-Threaded Matrix Multiplication
inferredcites →https://doi.org/10.1109/jproc.2004.840444openalex-snapshot
Is Search Really Necessary to Generate High-Performance BLAS?
inferredcites →https://doi.org/10.1109/sbac-pad.2012.35openalex-snapshot
On the Efficiency of Register File versus Broadcast Interconnect for Collective Communications in Data-Parallel Hardware Accelerators
inferredcites →https://doi.org/10.1109/tc.2012.132openalex-snapshot
Codesign Tradeoffs for High-Performance, Low-Power Linear Algebra Architectures
inferredcites →https://doi.org/10.1145/1188455openalex-snapshot
Proceedings of the 2006 ACM/IEEE conference on Supercomputing - SC '06
inferredcites →https://doi.org/10.1145/1356052.1356053openalex-snapshot
Anatomy of high-performance matrix multiplication
inferredcites →https://doi.org/10.1145/1377603.1377607openalex-snapshot
High-performance implementation of the level-3 BLAS
inferredcites →https://doi.org/10.1145/2503210.2503219openalex-snapshot
AUGEM
inferredcites →https://doi.org/10.1145/2591635.2667174openalex-snapshot
Optimizing matrix multiply using PHiPAC
inferredcites →https://doi.org/10.1145/263580.263662openalex-snapshot
Optimizing matrix multiply using PHiPAC
inferredcites →https://doi.org/10.1145/2755561openalex-snapshot
The BLIS Framework
inferredcites →https://doi.org/10.1145/2764454openalex-snapshot
BLIS: A Framework for Rapidly Instantiating BLAS Functionality
inferredcites →https://doi.org/10.1145/355841.355847openalex-snapshot
Basic Linear Algebra Subprograms for Fortran Usage
inferredcites →https://doi.org/10.1145/42288.42291openalex-snapshot
An extended set of FORTRAN basic linear algebra subprograms
inferredcites →https://doi.org/10.1145/77626.79170openalex-snapshot
A set of level 3 basic linear algebra subprograms
inferredcites →https://doi.org/10.5555/509058.509096openalex-snapshot
Automatically Tuned Linear Algebra Software

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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Autotuning PolyBench benchmarks with LLVM Clang/Polly loop optimization pragmas using Bayesian optimization
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Analytical modeling of matrix–vector multiplication on multicore processors
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Fast matrix multiplication via compiler‐only layered data reorganization and intrinsic lowering
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Automatic Memory-Efficient Scheduling of CNNs
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Performance Analysis of Matrix Multiplication for Deep Learning on the Edge
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Performance Analysis of Convolution Algorithms for Deep Learning on Edge Processors
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The Method for Increasing the Software Efficiency for Computing Systems with a Hierarchical Memory Structure
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Improving the Performance of Task-Based Linear Algebra Software with Autotuning Techniques on Heterogeneous Architectures
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GEMM-Like Convolution for Deep Learning Inference on the Xilinx Versal
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Parameter Estimation via Time Modeling for MLIR Implementation of GEMM
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MEPAD: A Memory-Efficient Parallelized Direct Convolution Algorithm for Deep Neural Networks
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Inference with Transformer Encoders on ARM and RISC-V Multicore Processors
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A Proposal for Loop-Transformation Pragmas
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Which C compiler and BLAS/LAPACK library should I use: gretl’s numerical efficiency in different configurations
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Architecture-aware configuration and scheduling of matrix multiplication on asymmetric multicore processors
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An implementation of matrix–matrix multiplication on the Intel KNL processor with AVX-512
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Cache-aware optimization of matrix multiplication and matrix factorizations on multicore processors
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Time and energy modeling of a high-performance multi-threaded Cholesky factorization
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Auto-tuning GEMM kernels on the Intel KNL and Intel Skylake-SP processors
inferred← citeshttps://doi.org/10.1007/s11227-021-03636-4openalex-snapshot
Low precision matrix multiplication for efficient deep learning in NVIDIA Carmel processors
inferred← citeshttps://doi.org/10.1007/s11227-022-04581-6openalex-snapshot
A BLIS-like matrix multiplication for machine learning in the RISC-V ISA-based GAP8 processor
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Micro-kernels for portable and efficient matrix multiplication in deep learning
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Automatic generation of ARM NEON micro-kernels for matrix multiplication
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Extending a predictable machine learning framework with efficient gemm-based convolution routines
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Optimized implementation for calculation and fast-update of Pfaffians installed to the open-source fermionic variational solver mVMC
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Efficient and portable GEMM-based convolution operators for deep neural network training on multicore processors
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High performance and energy efficient inference for deep learning on multicore ARM processors using general optimization techniques and BLIS
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Reformulating the direct convolution for high-performance deep learning inference on ARM processors
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Parallel GEMM-based convolutions for deep learning on multicore ARM and RISC-V architectures
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Analytical parallelization of programs on multicore processors
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A Flexible-blocking Based Approach for Performance Tuning of Matrix Multiplication Routines for Large Matrices with Edge Cases
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Progressive Raising in Multi-level IR
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oneDNN Graph Compiler: A Hybrid Approach for High-Performance Deep Learning Compilation
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Tackling the Matrix Multiplication Micro-Kernel Generation with Exo
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Chimera: An Analytical Optimizing Framework for Effective Compute-intensive Operators Fusion
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Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices
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High-Performance Matrix Multiplication on the New Generation Shenwei Processor
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Im2win: Memory Efficient Convolution On SIMD Architectures
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Generating Families of Practical Fast Matrix Multiplication Algorithms
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Demystifying ARM SME to Optimize General Matrix Multiplications
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An Efficient Implementation of DGEMM on the Latest Shenwei Processor
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Anatomy of the BLIS Family of Algorithms for Matrix Multiplication
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Toward Matrix Multiplication for Deep Learning Inference on the Xilinx Versal
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Portable, High Performance Matrix Multiplication Micro-Kernels for RISC-V with ExO
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Autotuning PolyBench Benchmarks with LLVM Clang/Polly Loop Optimization Pragmas Using Bayesian Optimization
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High Performance and Portable Convolution Operators for Multicore Processors
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The BLIS Framework
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Performance optimization for the k-nearest neighbors kernel on x86 architectures
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Implementing High-performance Complex Matrix Multiplication via the 3m and 4m Methods
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TTC
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Program generation for small-scale linear algebra applications
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Loop transformations leveraging hardware prefetching
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OpenMP-based parallel implementation of matrix-matrix multiplication on the intel knights landing
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Loop transformations leveraging hardware prefetching
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High-Performance Generalized Tensor Operations
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Architectural support for convolutional neural networks on modern CPUs
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SCP
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Optimizing parallel GEMM routines using auto-tuning with Intel AVX-512
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Analytical cache modeling and tilesize optimization for tensor contractions
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Efficient hierarchical online-autotuning
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LIBSHALOM
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LoopOpt
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MLIR-based code generation for GPU tensor cores
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Cache Optimization and Performance Modeling of Batched, Small, and Rectangular Matrix Multiplication on Intel, AMD, and Fujitsu Processors
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SMaLL: Software for Rapidly Instantiating Machine Learning Libraries
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Rank-Polymorphism for Shape-Guided Blocking
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Automatic Generation of Micro-kernels for Performance Portability of Matrix Multiplication on RISC-V Vector Processors
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Algorithm 1039: Automatic Generators for a Family of Matrix Multiplication Routines with Apache TVM
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Optimizing Attention by Exploiting Data Reuse on ARM Multi-core CPUs
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FactorFlow: Mapping GEMMs on Spatial Architectures through Adaptive Programming and Greedy Optimization
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Architecture-Aware Models of AI Engines for High-Performance Matrix Matrix Multiplication
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A Decoupled Analytical Model for Tile Size Selection in Affine Programs
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SOFTWARE PERFORMANCE INDICATORS DETERMINATION FOR COMPUTING SYSTEMS WITH HIERARCHICAL MEMORY STRUCTURE
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Optimization Methods for Generalized Tensor Contraction
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Binary neural networks for speech recognition
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Performance Modeling and Prediction for Dense Linear Algebra
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Memory-Access Optimization of GEMM on the WX-H8000 via Software Prefetching and NUMA-Aware Data Distribution
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Automating the Last-Mile for High Performance Dense Linear Algebra
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On the Efficacy and High-Performance Implementation of Quaternion Matrix Multiplication
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The MOMMS Family of Matrix Multiplication Algorithms
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High Performance Code Generation in MLIR: An Early Case Study with GEMM
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High Performance and Portable Convolution Operators for ARM-based Multicore Processors
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Autotuning PolyBench Benchmarks with LLVM Clang/Polly Loop Optimization Pragmas Using Bayesian Optimization
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Autotuning PolyBench Benchmarks with LLVM Clang/Polly Loop Optimization Pragmas Using Bayesian Optimization (extended version)
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Tuna: A Static Analysis Approach to Optimizing Deep Neural Networks
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High performance and energy efficient inference for deep learning on ARM processors
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High-Performance Level-1 and Level-2 BLAS
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Automatic generation of fast BLAS3-GEMM: a portable compiler approach
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Efficient hardware acceleration of deep neural networks via arithmetic complexity reduction
inferred← citeshttps://doi.org/10.6035/14101.2018.209077openalex-snapshot
Multithreaded Dense Linear Algebra on Asymmetric Multi-core Processors
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