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An Adaptive Demand-Based Caching Mechanism for NAND Flash Memory Storage Systems
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
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A New Hybrid Fault Diagnostic Method for Combining Dependency Matrix Diagnosis and Fuzzy Diagnosis Based on an Enhanced Inference Operator
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Energy-aware assignment and scheduling for hybrid main memory in embedded systems
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Defending jamming attack in wide-area monitoring system for smart grid
inferredcites →https://doi.org/10.1016/j.jcss.2012.11.002openalex-snapshot
Security-aware optimization for ubiquitous computing systems with SEAT graph approach
inferredcites →https://doi.org/10.1016/j.jpdc.2012.09.007openalex-snapshot
A decentralized approach for mining event correlations in distributed system monitoring
inferredcites →https://doi.org/10.1016/j.sysarc.2013.05.015openalex-snapshot
Clustering scheduling for hardware tasks in reconfigurable computing systems
inferredcites →https://doi.org/10.1109/date.2011.5763009openalex-snapshot
An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems
inferredcites →https://doi.org/10.1109/msst.2011.5937215openalex-snapshot
S-FTL: An efficient address translation for flash memory by exploiting spatial locality
inferredcites →https://doi.org/10.1109/rtas.2011.23openalex-snapshot
A Two-Level Caching Mechanism for Demand-Based Page-Level Address Mapping in NAND Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/rtas.2012.27openalex-snapshot
Real-Time Flash Translation Layer for NAND Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tc.2010.126openalex-snapshot
A Management Strategy for the Reliability and Performance Improvement of MLC-Based Flash-Memory Storage Systems
inferredcites →https://doi.org/10.1109/tc.2013.158openalex-snapshot
An Adaptive Endurance-Aware ${B^+}$-Tree for Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tc.2014.2329680openalex-snapshot
On-Demand Block-Level Address Mapping in Large-Scale NAND Flash Storage Systems
inferredcites →https://doi.org/10.1109/tc.2015.2409857openalex-snapshot
Phase-Change Memory Optimization for Green Cloud with Genetic Algorithm
inferredcites →https://doi.org/10.1109/tcad.2014.2347929openalex-snapshot
A Reliability-Aware Address Mapping Strategy for NAND Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tcad.2014.2351581openalex-snapshot
PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method
inferredcites →https://doi.org/10.1109/tcad.2014.2376989openalex-snapshot
Wear Relief for High-Density Phase Change Memory Through Cell Morphing Considering Process Variation
inferredcites →https://doi.org/10.1109/tcad.2015.2445741openalex-snapshot
RRAM-Based Analog Approximate Computing
inferredcites →https://doi.org/10.1109/tcad.2015.2453369openalex-snapshot
Retention Trimming for Lifetime Improvement of Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tcad.2015.2474394openalex-snapshot
An Endurance-Aware Metadata Allocation Strategy for MLC NAND Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tce.2002.1010143openalex-snapshot
A space-efficient flash translation layer for CompactFlash systems
inferredcites →https://doi.org/10.1109/tvlsi.2011.2142015openalex-snapshot
A Space Reuse Strategy for Flash Translation Layers in SLC NAND Flash Memory Storage Systems
inferredcites →https://doi.org/10.1109/tvlsi.2013.2267754openalex-snapshot
STT-RAM Cache Hierarchy With Multiretention MTJ Designs
inferredcites →https://doi.org/10.1109/tvlsi.2013.2278295openalex-snapshot
Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems
inferredcites →https://doi.org/10.1109/tvlsi.2013.2288687openalex-snapshot
A Reliability Enhanced Address Mapping Strategy for Three-Dimensional (3-D) NAND Flash Memory
inferredcites →https://doi.org/10.1109/tvlsi.2013.2294462openalex-snapshot
A Unified Write Buffer Cache Management Scheme for Flash Memory
inferredcites →https://doi.org/10.1109/tvlsi.2014.2326797openalex-snapshot
Read Performance: The Newest Barrier in Scaled STT-RAM
inferredcites →https://doi.org/10.1109/tvlsi.2014.2332099openalex-snapshot
True-Damage-Aware Enumerative Coding for Improving nand Flash Memory Endurance
inferredcites →https://doi.org/10.1145/1210596.1210600openalex-snapshot
The Design of efficient initialization and crash recovery for log-based file systems over flash memory
inferredcites →https://doi.org/10.1145/1278480.1278659openalex-snapshot
Energy-aware data compression for multi-level cell (MLC) flash memory
inferredcites →https://doi.org/10.1145/1289816.1289878openalex-snapshot
Performance improvement of block based NAND flash translation layer
inferredcites →https://doi.org/10.1145/1837274.1837495openalex-snapshot
Impact of process variations on emerging memristor
inferredcites →https://doi.org/10.1145/1878961.1878991openalex-snapshot
Demand-based block-level address mapping in large-scale NAND flash storage systems
inferredcites →https://doi.org/10.1145/2000064.2000074openalex-snapshot
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
inferredcites →https://doi.org/10.1145/2159542.2159546openalex-snapshot
Timing Analysis of System Initialization and Crash Recovery for a Segment-Based Flash Translation Layer
inferredcites →https://doi.org/10.1145/2228360.2228518openalex-snapshot
Joint management of RAM and flash memory with access pattern considerations
inferredcites →https://doi.org/10.1145/2423636.2423642openalex-snapshot
Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads
inferredcites →https://doi.org/10.1145/2480362.2480650openalex-snapshot
Demand-based flash translation layer considering spatial locality
inferredcites →https://doi.org/10.1145/2697394openalex-snapshot
Towards Write-Activity-Aware Page Table Management for Non-volatile Main Memories
inferredcites →https://doi.org/10.1145/2815622openalex-snapshot
Exploiting Page Correlations for Write Buffering in Page-Mapping Multichannel SSDs
inferredcites →https://doi.org/10.1145/2847254openalex-snapshot
Symmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Preserving SSD lifetime in deep learning applications with delta snapshots
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SSD internal cache management policies: A survey
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Caiti: I/O transit caching for persistent memory-based block device
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Security of IoT Device: Perspective Forensic/Anti-Forensic Issues on Invalid Area of NAND Flash Memory
inferred← citeshttps://doi.org/10.1109/icmsao.2019.8880300openalex-snapshot
Temperature-Aware Task Scheduling for Dark Silicon Many-Core System-on-Chip
inferred← citeshttps://doi.org/10.1109/tc.2017.2679180openalex-snapshot
A Block-Level Log-Block Management Scheme for MLC NAND Flash Memory Storage Systems
inferred← citeshttps://doi.org/10.1109/tc.2019.2947897openalex-snapshot
WAL-SSD: Address Remapping-Based Write-Ahead-Logging Solid-State Disks
inferred← citeshttps://doi.org/10.1109/tcad.2018.2821442openalex-snapshot
A Thermal-Aware Physical Space Reallocation for Open-Channel SSD With 3-D Flash Memory
inferred← citeshttps://doi.org/10.1109/tcad.2022.3229293openalex-snapshot
Adaptive Management With Request Granularity for DRAM Cache Inside nand-Based SSDs
inferred← citeshttps://doi.org/10.1145/3400302.3415764openalex-snapshot
Full-chip thermal map estimation for commercial multi-core CPUs with generative adversarial learning
inferred← citeshttps://doi.org/10.1145/3728644openalex-snapshot
HaParallel: Hit Ratio-Aware Parallel Aggressive Eviction Cache Management Algorithm for SSDs
inferred← citeshttps://doi.org/10.3389/fnbot.2017.00056openalex-snapshot
Bio-Inspired Genetic Algorithms with Formalized Crossover Operators for Robotic Applications
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