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Reverse Engineering Digital ICs through Geometric Embedding of Circuit Graphs

https://doi.org/10.1145/3193121

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/bf02278710openalex-snapshot

A shortest augmenting path algorithm for dense and sparse linear assignment problems

inferredcites →https://doi.org/10.1007/s11222-007-9033-zopenalex-snapshot

A tutorial on spectral clustering

inferredcites →https://doi.org/10.1016/0305-0548(96)00010-xopenalex-snapshot

Linear and semi-assignment problems: A core oriented approach

inferredcites →https://doi.org/10.1016/b978-0-12-394435-1.00022-3openalex-snapshot

Large Sparse Eigenvalue Problems

inferredcites →https://doi.org/10.1016/s0166-218x(98)00083-3openalex-snapshot

Spectral partitioning with multiple eigenvectors

inferredcites →https://doi.org/10.1016/s0167-9260(98)00014-5openalex-snapshot

Establishing latch correspondence for sequential circuits using distinguishing signatures

inferredcites →https://doi.org/10.1016/s0898-1221(96)90463-0openalex-snapshot

Advances in neural information processing systems 7

inferredcites →https://doi.org/10.1109/43.144852openalex-snapshot

An efficient eigenvector approach for finding netlist partitions

inferredcites →https://doi.org/10.1109/43.310898openalex-snapshot

Spectral K-way ratio-cut partitioning and clustering

inferredcites →https://doi.org/10.1109/54.785838openalex-snapshot

Unveiling the ISCAS-85 benchmarks: a case study in reverse engineering

inferredcites →https://doi.org/10.1109/cicc.1993.590685openalex-snapshot

A combined eigenvector tabu search approach for circuit partitioning

inferredcites →https://doi.org/10.1109/fmcad.2015.7542265openalex-snapshot

Simulation graphs for reverse engineering

inferredcites →https://doi.org/10.1109/host54066.2022.9839913openalex-snapshot

Proceedings of the 2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

inferredcites →https://doi.org/10.1109/hst.2012.6224325openalex-snapshot

Reverse engineering circuits using behavioral pattern mining

inferredcites →https://doi.org/10.1109/hst.2013.6581568openalex-snapshot

WordRev: Finding word-level structures in a sea of bit-level gates

inferredcites →https://doi.org/10.1109/iccad.1992.279334openalex-snapshot

A new approach to effective circuit clustering

inferredcites →https://doi.org/10.1109/iscas.2010.5537093openalex-snapshot

A highly efficient method for extracting FSMs from flattened gate-level netlist

inferredcites →https://doi.org/10.1109/iwsoc.2005.17openalex-snapshot

A multilevel eigenvalue based circuit partitioning technique

inferredcites →https://doi.org/10.1109/tetc.2013.2294918openalex-snapshot

Reverse Engineering Digital Circuits Using Structural and Functional Analyses

inferredcites →https://doi.org/10.1137/1.9780898717754openalex-snapshot

Assignment Problems

inferredcites →https://doi.org/10.1145/157485.165115openalex-snapshot

Geometric embeddings for faster and better multi-way netlist partitioning

inferredcites →https://doi.org/10.1145/196244.196602openalex-snapshot

Partitioning very large circuits using analytical placement techniques

inferredcites →https://doi.org/10.1145/201310.201331openalex-snapshot

Spectral-based multi-way FPGA partitioning

inferredcites →https://doi.org/10.1145/321694.321699openalex-snapshot

Theoretical Improvements in Algorithmic Efficiency for Network Flow Problems

inferredcites →https://doi.org/10.21105/joss.00026openalex-snapshot

Armadillo: a template-based C++ library for linear algebra

inferredcites →https://doi.org/10.48550/arxiv.1210.6293openalex-snapshot

MLPACK: A Scalable C++ Machine Learning Library

inferredcites →https://doi.org/10.5555/2682923.2682943openalex-snapshot

Template-based circuit understanding

inferredcites →https://doi.org/10.5555/2755753.2755860openalex-snapshot

Hardware trojan detection for gate-level ICs using signal correlation based clustering

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/j.vlsi.2019.10.002openalex-snapshot

Machine learning and structural characteristics for reverse engineering

inferred← citeshttps://doi.org/10.1109/dac56929.2023.10247828openalex-snapshot

Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks

inferred← citeshttps://doi.org/10.1109/dac63849.2025.11132728openalex-snapshot

BoolE: Exact Symbolic Reasoning via Boolean Equality Saturation

inferred← citeshttps://doi.org/10.1109/tcad.2021.3110807openalex-snapshot

GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists

inferred← citeshttps://doi.org/10.1145/3287624.3288740openalex-snapshot

Machine learning and structural characteristics for reverse engineering

inferred← citeshttps://doi.org/10.1145/3329081openalex-snapshot

Revealing Cluster Hierarchy in Gate-level ICs Using Block Diagrams and Cluster Estimates of Circuit Embeddings

inferred← citeshttps://doi.org/10.1145/3464959openalex-snapshot

Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives

inferred← citeshttps://doi.org/10.1145/3508352.3549471openalex-snapshot

AppGNN

inferred← citeshttps://doi.org/10.1145/3591237openalex-snapshot

Loop Rerolling for Hardware Decompilation

inferred← citeshttps://doi.org/10.23919/date54114.2022.9774760openalex-snapshot

Golden Model-Free Hardware Trojan Detection by Classification of Netlist Module Graphs

inferred← citeshttps://doi.org/10.32657/10356/181494openalex-snapshot

Machine learning for high-dimensional data analysis in hardware assurance applications

inferred← citeshttps://doi.org/10.48550/arxiv.2002.04210openalex-snapshot

Hardware Trust and Assurance through Reverse Engineering: A Survey and Outlook from Image Analysis and Machine Learning Perspectives

inferred← citeshttps://doi.org/10.5821/dissertation-2117-182125openalex-snapshot

Algorithmic techniques for physical design : macro placement and under-the-cell routing

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