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Fast and exact analysis for LRU caches
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Outgoing claims: the papers this work cites, builds on, or argues with.
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Antichains: A New Algorithm for Checking Universality of Finite Automata
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aiT: Worst-Case Execution Time Prediction by Static Program Analysis
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Ascertaining Uncertainty for Efficient Exact Cache Analysis
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Abstract Interpretation of FIFO Replacement
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OTAWA: An Open Toolbox for Adaptive WCET Analysis
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Some efficient solutions to the affine scheduling problem. Part II. Multidimensional time
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Some efficient solutions to the affine scheduling problem. I. One-dimensional time
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Zero-suppressed BDDs and their applications
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Efficient manipulation of decision diagrams
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Timing predictability of cache replacement policies
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Scalable and precise refinement of cache timing analysis via path-sensitive verification
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CacheBleed: a timing attack on OpenSSL constant-time RSA
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Generating cache hints for improved program efficiency
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Efficient and Precise Cache Behavior Prediction for Real-Time Systems
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Precise and Efficient FIFO-Replacement Analysis Based on Static Phase Detection
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Timing anomalies in dynamically scheduled microprocessors
inferredcites →https://doi.org/10.1109/rtas.2016.7461358openalex-snapshot
Precise Cache Timing Analysis via Symbolic Execution
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Fast instruction cache analysis via static cache simulation
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Proceedings. 34th Annual Simulation Symposium
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Last-Level Cache Side-Channel Attacks are Practical
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Spectre Attacks: Exploiting Speculative Execution
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The worst-case execution-time problem—overview of methods and survey of tools
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Are AES x86 cache timing attacks still feasible?
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Maximizing parallelism and minimizing synchronization with affine transforms
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Rigorous analysis of software countermeasures against cache attacks
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Analytical modeling of cache behavior for affine programs
inferredcites →https://doi.org/10.1145/378795.378859openalex-snapshot
Exact analysis of the cache behavior of nested loops
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Estimating cache misses and locality using stack distances
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TACLeBench : a benchmark collection to support worst-case execution time research
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A Survey on Static Cache Analysis for Real-Time Systems
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A Definition and Classification of Timing Anomalies
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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An Abstract Semantics of Speculative Execution for Reasoning About Security Vulnerabilities
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Deconstructing Subset Construction
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Completeness in Static Analysis by Abstract Interpretation: A Personal Point of View
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An adaptive NLP-driven access control framework for northbound interface in software defined network
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The complexity gap in the static analysis of cache accesses grows if procedure calls are added
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Design and analysis of SIC: a provably timing-predictable pipelined processor core
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Precise, efficient, and context-sensitive cache analysis
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Timing-aware analysis of shared cache interference for non-preemptive scheduling
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Effective data management strategy and RDD weight cache replacement strategy in Spark
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Experimental Research of the Caching Algorithms Effectiveness
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Optimization of Object Relational Mapping: Query Profiling Integration Based on Frequency and Timestamps Implementation in LRU
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Cache Replacement Strategy Based on User Behaviour Analysis for a Massive Small File Storage System
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Competitive Consistent Caching for Transactions
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Integration and Verification of L1 Data Cache in SweRV EH1
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Improving the Execution Time of Industrial Applications through Planned Cache Eviction Policy Selection
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A Unified Framework for Quantitative Cache Analysis
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Cache Persistence Analysis: Finally Exact
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Leveraging LLVM's ScalarEvolution for Symbolic Data Cache Analysis
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Tight Cache Contention Analysis for WCET Estimation on Multicore Systems
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Exact Worst-Case Execution-Time Analysis for Implicit Model Predictive Control
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A fast analytical model of fully associative caches
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On the Complexity of Cache Analysis for Different Replacement Policies
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Precise and Efficient Analysis of Context-Sensitive Cache Conflict Sets
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Warping cache simulation of polyhedral programs
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Analysis of Shared Cache Interference in Multi-Core Systems using Event-Arrival Curves
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Towards Analysing Cache-Related Preemption Delay in Non-Inclusive Cache Hierarchies
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Path-Sensitive Abstract Interpretation for WCET Estimation
inferred← citeshttps://doi.org/10.4230/lipics.ecrts.2026.13openalex-snapshot
CacheFlow: Using Maximum Flow to Bound Cache-Based Preemption Delays
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Abstract Interpretation under Speculative Execution
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Analyse et contrôle des interférences liées à la cohérence de cache dans les multi-coeurs COTS
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Efficient tree-based symbolic WCET computation
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