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https://doi.org/10.1145/3291052
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/dsn.2015.49openalex-snapshot
Read Disturb Errors in MLC NAND Flash Memory: Characterization, Mitigation, and Recovery
inferredcites →https://doi.org/10.1109/gcce.2014.7031339openalex-snapshot
Block reinforcement to optimize lifetime of flash storage devices
inferredcites →https://doi.org/10.1109/hpca.2011.5749736openalex-snapshot
I-CASH: Intelligently Coupled Array of SSD and HDD
inferredcites →https://doi.org/10.1109/hpca.2014.6835961openalex-snapshot
Sprinkler: Maximizing resource utilization in many-chip solid state disks
inferredcites →https://doi.org/10.1109/hpca.2015.7056062openalex-snapshot
Data retention in MLC NAND flash memory: Characterization, optimization, and recovery
inferredcites →https://doi.org/10.1109/hpca.2017.61openalex-snapshot
Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques
inferredcites →https://doi.org/10.1109/hpca.2018.00050openalex-snapshot
HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness
inferredcites →https://doi.org/10.1109/iccd.2012.6378623openalex-snapshot
Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime
inferredcites →https://doi.org/10.1109/iccd.2013.6657034openalex-snapshot
Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation
inferredcites →https://doi.org/10.1109/iccd.2018.00064openalex-snapshot
Characterizing 3D Charge Trap NAND Flash: Observations, Analyses and Applications
inferredcites →https://doi.org/10.1109/icpp.2012.17openalex-snapshot
An Efficient SSD-based Hybrid Storage Architecture for Large-Scale Search Engines
inferredcites →https://doi.org/10.1109/imw.2017.7939074openalex-snapshot
Characterization of TLC 3D-NAND Flash Endurance through Machine Learning for LDPC Code Rate Optimization
inferredcites →https://doi.org/10.1109/imw.2017.7939077openalex-snapshot
Data-Retention Characteristics Comparison of 2D and 3D TLC NAND Flash Memories
inferredcites →https://doi.org/10.1109/imw.2017.7939081openalex-snapshot
Evolution of NAND Flash Memory: From 2D to 3D as a Storage Market Leader
inferredcites →https://doi.org/10.1109/irps.2013.6531979openalex-snapshot
Error-prediction analyses in 1X, 2X and 3Xnm NAND flash memories for system-level reliability improvement of solid-state drives (SSDs)
inferredcites →https://doi.org/10.1109/jproc.2017.2713127openalex-snapshot
Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives
inferredcites →https://doi.org/10.1109/jproc.2017.2725738openalex-snapshot
Reliability of Solid-State Drives Based on NAND Flash Memory
inferredcites →https://doi.org/10.1109/jsac.2016.2603608openalex-snapshot
Enabling Accurate and Practical Online Flash Channel Modeling for Modern MLC NAND Flash Memory
inferredcites →https://doi.org/10.1109/mascots.2015.22openalex-snapshot
Flash-Aware High-Performance and Endurable Cache
inferredcites →https://doi.org/10.1109/micro.2006.49openalex-snapshot
Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches
inferredcites →https://doi.org/10.1109/msst.2015.7208284openalex-snapshot
WARM: Improving NAND flash memory lifetime with write-hotness aware retention management
inferredcites →https://doi.org/10.1109/mwscas.2011.6026356openalex-snapshot
In-page management of error correction code for MLC flash storages
inferredcites →https://doi.org/10.1109/tc.2014.2345387openalex-snapshot
Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality
inferredcites →https://doi.org/10.1109/tc.2015.2401028openalex-snapshot
Adaptive ECC Scheme for Hybrid SSD’s
inferredcites →https://doi.org/10.1109/tcad.2015.2504868openalex-snapshot
An Integrated Approach for Managing Read Disturbs in High-Density NAND Flash Memory
inferredcites →https://doi.org/10.1109/tce.2012.6311327openalex-snapshot
PCRAM-assisted ECC management for enhanced data reliability in flash storage systems
inferredcites →https://doi.org/10.1109/tvlsi.2009.2015666openalex-snapshot
VLSI Implementation of BCH Error Correction for Multilevel Cell NAND Flash Memory
inferredcites →https://doi.org/10.1109/tvlsi.2016.2589318openalex-snapshot
Antiwear Leveling Design for SSDs With Hybrid ECC Capability
inferredcites →https://doi.org/10.1145/1089733.1089735openalex-snapshot
Algorithms and data structures for flash memories
inferredcites →https://doi.org/10.1145/1244002.1244248openalex-snapshot
On efficient wear leveling for large-scale flash-memory storage systems
inferredcites →https://doi.org/10.1145/1508244.1508271openalex-snapshot
DFTL
inferredcites →https://doi.org/10.1145/1989323.1989325openalex-snapshot
LazyFTL
inferredcites →https://doi.org/10.1145/2168836.2168862openalex-snapshot
Delta-FTL
inferredcites →https://doi.org/10.1145/2465529.2465548openalex-snapshot
Revisiting widely held SSD expectations and rethinking system-level implications
inferredcites →https://doi.org/10.1145/2489792openalex-snapshot
Exploiting workload dynamics to improve SSD read latency via differentiated error correction codes
inferredcites →https://doi.org/10.1145/2501626.2512467openalex-snapshot
A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systems
inferredcites →https://doi.org/10.1145/2541940.2541959openalex-snapshot
SDF
inferredcites →https://doi.org/10.1145/2591971.2591994openalex-snapshot
Neighbor-cell assisted error correction for MLC NAND flash memories
inferredcites →https://doi.org/10.1145/2592798.2592818openalex-snapshot
An aggressive worn-out flash block management scheme to alleviate SSD performance degradation
inferredcites →https://doi.org/10.1145/2593069.2593130openalex-snapshot
EC-Cache
inferredcites →https://doi.org/10.1145/2741948.2741949openalex-snapshot
An efficient page-level FTL to optimize address translation in flash memory
inferredcites →https://doi.org/10.1145/285930.285998openalex-snapshot
Improving direct-mapped cache performance by the addition of a small fully-associative cache prefetch buffers
inferredcites →https://doi.org/10.1145/3033273openalex-snapshot
WiscKey
inferredcites →https://doi.org/10.1145/3162616openalex-snapshot
Characterizing 3D Floating Gate NAND Flash
inferredcites →https://doi.org/10.1145/3219617.3219659openalex-snapshot
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation
inferredcites →https://doi.org/10.1145/325164.325162openalex-snapshot
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
inferredcites →https://doi.org/10.23919/date.2017.7927182openalex-snapshot
Lifetime adaptive ECC in NAND flash page management
inferredcites →https://doi.org/10.5555/2208461.2208463openalex-snapshot
The bleak future of NAND flash memory
inferredcites →https://doi.org/10.5555/2208461.2208471openalex-snapshot
Reducing SSD read latency via NAND flash program and erase suspension
inferredcites →https://doi.org/10.5555/2591272.2591298openalex-snapshot
LDPC-in-SSD: making advanced error correction codes work effectively in solid state drives
inferredcites →https://doi.org/10.5555/2750482.2750503openalex-snapshot
F2FS: a new file system for flash storage

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/s10836-023-06075-6openalex-snapshot
E3C Techniques for Protecting NAND Flash Memories
inferred← citeshttps://doi.org/10.1016/j.compeleceng.2026.111433openalex-snapshot
Error correction and mitigation techniques in SSDs: A survey
inferred← citeshttps://doi.org/10.1016/j.future.2026.108682openalex-snapshot
FTL optimization for 3D NAND flash considering layer RBER variation and data precision
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103347openalex-snapshot
Eliminating duplicate writes of logging via no-logging flash translation layer in SSDs
inferred← citeshttps://doi.org/10.1109/access.2020.3021498openalex-snapshot
A Stepwise Rate-Compatible LDPC and Parity Management in NAND Flash Memory-Based Storage Devices
inferred← citeshttps://doi.org/10.1109/dac18072.2020.9218631openalex-snapshot
Layer RBER Variation Aware Read Performance Optimization for 3D Flash Memories
inferred← citeshttps://doi.org/10.1109/itc-asia51099.2020.00020openalex-snapshot
ECC Caching Techniques for Protecting NAND Flash Memories
inferred← citeshttps://doi.org/10.1109/tcad.2022.3210068openalex-snapshot
eLDPC: An Efficient LDPC Coding Scheme for Phase-Change Memory
inferred← citeshttps://doi.org/10.1109/tcad.2022.3224898openalex-snapshot
ZoneLife: How to Utilize Data Lifetime Semantics to Make SSDs Smarter
inferred← citeshttps://doi.org/10.1109/tce.2023.3319638openalex-snapshot
ALCod: Adaptive LDPC Coding for 3-D NAND Flash Memory Using Inter-Layer RBER Variation
inferred← citeshttps://doi.org/10.1109/tcsi.2025.3551354openalex-snapshot
Temperature-Aware Differential Programming for Performance and Energy Optimization on 3D NAND High-Density Flash Memory
inferred← citeshttps://doi.org/10.1109/tvlsi.2025.3551400openalex-snapshot
Revisiting Multiple ECC on High-Density NAND Flash memory
inferred← citeshttps://doi.org/10.1145/3713082.3730386openalex-snapshot
Leveraging Software Fault Tolerance for Longer Flash Hardware Lifespan
inferred← citeshttps://doi.org/10.23919/date51398.2021.9473923openalex-snapshot
SW-WAL: Leveraging Address Remapping of SSDs to Achieve Single-Write Write-Ahead Logging
inferred← citeshttps://doi.org/10.3390/electronics9122074openalex-snapshot
Proposal of an Adaptive Fault Tolerance Mechanism to Tolerate Intermittent Faults in RAM
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