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A Neural Network Prefetcher for Arbitrary Memory Access Patterns
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Outgoing claims: the papers this work cites, builds on, or argues with.
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Design and Implementation of the HPCS Graph Analysis Benchmark on Symmetric Multiprocessors
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A Primer on Hardware Prefetching
inferredcites →https://doi.org/10.1007/978-3-319-46493-0_32openalex-snapshot
XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks
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Neural Networks: Tricks of the Trade
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Advances in neural information processing systems 7
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Hybrid computing using a neural network with dynamic external memory
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Computational power of neural networks: a characterization in terms of Kolmogorov complexity
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Modified Fused Multiply and Add for Exact Low Precision Product Accumulation
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A Machine Learning Perspective on Predictive Coding with PAQ8
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Dynamic branch prediction with perceptrons
inferredcites →https://doi.org/10.1109/hpca.2004.10030openalex-snapshot
Data Cache Prefetching Using a Global History Buffer
inferredcites →https://doi.org/10.1109/hpca.2009.4798239openalex-snapshot
Practical off-chip meta-data for temporal memory streaming
inferredcites →https://doi.org/10.1109/hpca.2014.6835971openalex-snapshot
Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers
inferredcites →https://doi.org/10.1109/hpca.2016.7446087openalex-snapshot
Best-offset hardware prefetching
inferredcites →https://doi.org/10.1109/hpca.2018.00021openalex-snapshot
Domino Temporal Data Prefetcher
inferredcites →https://doi.org/10.1109/ijcnn.2005.1556189openalex-snapshot
Proceedings of the International Joint Conference on Neural Networks (IJCNN) 2005
inferredcites →https://doi.org/10.1109/ijcnn.2017.7966166openalex-snapshot
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Correlated load-address predictors
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1.1 Computing's energy problem (and what we can do about it)
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Proceedings 35th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-35)
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Neural Acceleration for General-Purpose Approximate Programs
inferredcites →https://doi.org/10.1109/mm.2015.4openalex-snapshot
The Movidius Myriad Architecture's Potential for Scientific Computing
inferredcites →https://doi.org/10.1109/tc.2016.2574353openalex-snapshot
DaDianNao: A Neural Network Supercomputer
inferredcites →https://doi.org/10.1109/tnnls.2016.2582924openalex-snapshot
LSTM: A Search Space Odyssey
inferredcites →https://doi.org/10.1145/125826.125932openalex-snapshot
An effective on-chip preloading scheme to reduce data access penalty
inferredcites →https://doi.org/10.1145/130385.130432openalex-snapshot
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inferredcites →https://doi.org/10.1145/1390156openalex-snapshot
Proceedings of the 25th international conference on Machine learning - ICML '08
inferredcites →https://doi.org/10.1145/1542275.1542349openalex-snapshot
Access map pattern matching for data cache prefetch
inferredcites →https://doi.org/10.1145/1555754.1555766openalex-snapshot
Spatio-temporal memory streaming
inferredcites →https://doi.org/10.1145/2540708.2540730openalex-snapshot
Linearizing irregular memory accesses for improved correlated prefetching
inferredcites →https://doi.org/10.1145/264107.264207openalex-snapshot
Prefetching using Markov predictors
inferredcites →https://doi.org/10.1145/2749469.2749473openalex-snapshot
Semantic locality and context-based prefetching using reinforcement learning
inferredcites →https://doi.org/10.1145/2830772.2830793openalex-snapshot
Efficiently prefetching complex address patterns
inferredcites →https://doi.org/10.1145/291069.291034openalex-snapshot
Dependence based prefetching for linked data structures
inferredcites →https://doi.org/10.1145/300979.300984openalex-snapshot
Correlated load-address predictors
inferredcites →https://doi.org/10.1145/300979.300989openalex-snapshot
Effective jump-pointer prefetching for linked data structures
inferredcites →https://doi.org/10.1145/3079856.3080246openalex-snapshot
In-Datacenter Performance Analysis of a Tensor Processing Unit
inferredcites →https://doi.org/10.1145/3140659.3080246openalex-snapshot
In-Datacenter Performance Analysis of a Tensor Processing Unit
inferredcites →https://doi.org/10.1145/76263openalex-snapshot
Proceedings of the 1989 ACM/IEEE conference on Supercomputing - Supercomputing '89
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Genealogy of the “Grandmother Cell”
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How to Train a Compact Binary Neural Network with High Accuracy?
inferredcites →https://doi.org/10.48550/arxiv.1408.5093openalex-snapshot
Caffe: Convolutional Architecture for Fast Feature Embedding
inferredcites →https://doi.org/10.48550/arxiv.1602.02830openalex-snapshot
Binarized Neural Networks: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1
inferredcites →https://doi.org/10.48550/arxiv.1609.07061openalex-snapshot
Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations
inferredcites →https://doi.org/10.48550/arxiv.1803.02329openalex-snapshot
Learning Memory Access Patterns
inferredcites →https://doi.org/10.5555/3195638.3195641openalex-snapshot
Perceptron learning for reuse prediction
inferredcites →https://doi.org/10.5555/3195638.3195711openalex-snapshot
Path confidence based lookahead prefetching
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.2139/ssrn.4584899openalex-extracted
Feasible Memory Access Prediction Using Short-Term, Online Machine Learning and Dynamic Vocabularies
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MemMAP: Compact and Generalizable Meta-LSTM Models for Memory Access Prediction
inferred← citeshttps://doi.org/10.1007/978-3-031-83796-8_18openalex-snapshot
File Prefetching Accuracy Enhancement Using Deep Learning Approaches
inferred← citeshttps://doi.org/10.1007/978-981-95-8399-7_4openalex-snapshot
3D-DP: A Practical DRL-Based Data Prefetcher with a Dynamic Prefetch Degree and Direction
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An Intelligent Framework for Oversubscription Management in CPU-GPU Unified Memory
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RL-CoPref: a reinforcement learning-based coordinated prefetching controller for multiple prefetchers
inferred← citeshttps://doi.org/10.1007/s11227-025-07224-8openalex-snapshot
Dhcm: a dynamic hierarchy coordination mechanism for memory optimization
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C-MemMAP: clustering-driven compact, adaptable, and generalizable meta-LSTM models for memory access prediction
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Competitive cost-effective memory access predictor through short-term online SVM and dynamic vocabularies
inferred← citeshttps://doi.org/10.1016/j.jpdc.2022.12.004openalex-snapshot
Deep learning based data prefetching in CPU-GPU unified virtual memory
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Net2Tab: Tabularizing neural networks with applications to data prefetching
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PatternS: An intelligent hybrid memory scheduler driven by page pattern recognition
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THEIA: Scalable and Effective Data Prefetching for Geo-Distributed Erasure-Coded Storage
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Enhancing Processor Performance using Bidirectional LSTM Memory Prefetching
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Efficient Large-Capacity Caching in Cloud Storage Using Skip-Gram-Based File Correlation Analysis
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UDNet: A Unified Deep Learning-Based AutoML Framework to Execute Multiple ML Strategies for Multi-Modal Unstructured Data Processing
inferred← citeshttps://doi.org/10.1109/access.2025.3569533openalex-snapshot
Memory Prefetching Evaluation of Scientific Applications on a Modern HPC Arm-Based Processor
inferred← citeshttps://doi.org/10.1109/apccas60141.2023.00035openalex-snapshot
Reinforcement Learning Based Prefetch-Control Mechanism
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Caching and Prefetching for Improving ORAM Performance
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A New Formulation of Neural Data Prefetching
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STEP: Spatial Footprint Prefetcher with Multi-Point Temporal Triggers
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From Memorization to Generalization: A Practical Neural Network Prefetching Framework
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Drishyam: An Image is Worth a Data Prefetcher
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Towards a Pragmatic ORAM Implementation Using Caching and Prefetching
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Reinforcement Learning-Driven Adaptive Prefetch Aggressiveness Control for Enhanced Performance in Parallel System Architectures
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