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Cache Locking Content Selection Algorithms for ARINC-653 Compliant RTOS
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/bltj.21532openalex-snapshot
Functional-Level Energy Characterization of µC/OS-II and Cache Locking for Energy Saving
inferredcites →https://doi.org/10.1007/978-3-319-00560-7_1openalex-snapshot
New Challenges for Future Avionic Architectures
inferredcites →https://doi.org/10.1007/s11241-007-9032-3openalex-snapshot
Timing predictability of cache replacement policies
inferredcites →https://doi.org/10.1093/comjnl/44.6.531openalex-snapshot
Use of Modern Processors in Safety-Critical Applications
inferredcites →https://doi.org/10.1109/dasc.2010.5655461openalex-snapshot
How to address certification for multi-core based IMA platforms: Current status and potential solutions
inferredcites →https://doi.org/10.1109/dasc11400.2006openalex-snapshot
2006 ieee/aiaa 25TH Digital Avionics Systems Conference
inferredcites →https://doi.org/10.1109/isorcw.2015.58openalex-snapshot
A Time-Predictable Instruction-Cache Architecture that Uses Prefetching and Cache Locking
inferredcites →https://doi.org/10.1109/issrew34977.2014openalex-snapshot
2014 IEEE International Symposium on Software Reliability Engineering Workshops
inferredcites →https://doi.org/10.1109/mdt.1987.295161openalex-snapshot
1987 Design Automation Conference
inferredcites →https://doi.org/10.1109/ms.2003.1241361openalex-snapshot
The state of the practice of software engineering
inferredcites →https://doi.org/10.1109/rtcsa.2008.42openalex-snapshot
Impact of Cache Partitioning on Multi-tasking Real Time Embedded Systems
inferredcites →https://doi.org/10.1109/secon.2015.7133037openalex-snapshot
Exploring hybrid cache locking to balance performance and time predictability
inferredcites →https://doi.org/10.1109/tvlsi.2017.2757477openalex-snapshot
PhLock: A Cache Energy Saving Technique Using Phase-Based Cache Locking
inferredcites →https://doi.org/10.1145/2259016.2259023openalex-snapshot
WCET-aware static locking of instruction caches
inferredcites →https://doi.org/10.1145/2535838.2535840openalex-snapshot
Polymorphic functions with set-theoretic types
inferredcites →https://doi.org/10.1145/2858792openalex-snapshot
A Survey of Techniques for Cache Locking
inferredcites →https://doi.org/10.1201/b17545-35openalex-snapshot
RTCA DO-297/EUROCAE ED-124 Integrated Modular Avionics (IMA) Design Guidance and Certification Considerations
inferredcites →https://doi.org/10.1201/b17545-36openalex-snapshot
ARINC Specification 653, Avionics Application Software Standard Interface
inferredcites →https://doi.org/10.1371/journal.pone.0082975openalex-snapshot
Combining Instruction Prefetching with Partial Cache Locking to Improve WCET in Real-Time Systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1016/j.jpdc.2025.105107openalex-snapshot
Thermal modeling and optimal allocation of avionics safety-critical tasks on heterogeneous MPSoCs
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103487openalex-snapshot
Taking a closer look at memory interference effects in commercial-off-the-shelf multicore SoCs
inferred← citeshttps://doi.org/10.1109/access.2020.3038170openalex-snapshot
A Dynamic Instruction Cache Locking Approach for Minimizing Worst Case Execution Time of a Single Task
inferred← citeshttps://doi.org/10.1109/access.2022.3151891openalex-snapshot
A Survey of Techniques for Reducing Interference in Real-Time Applications on Multicore Platforms
inferred← citeshttps://doi.org/10.1109/dasc66011.2025.11257192openalex-snapshot
Interrupt Related Interference Bounding in Aerospace Multicore Systems
inferred← citeshttps://doi.org/10.1109/rtss59052.2023.00030openalex-snapshot
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing
inferred← citeshttps://doi.org/10.1145/3465370openalex-snapshot
The Predictable Execution Model in Practice
inferred← citeshttps://doi.org/10.1145/3770858openalex-snapshot
Near-Optimal Cache Sharing through Co-Located Parallel Scheduling of Threads
inferred← citeshttps://doi.org/10.22360/springsim.2020.hpc.002openalex-snapshot
Simulator-based Framework towards Improved Cache Predictability for Multi-core Avionic System
inferred← citeshttps://doi.org/10.3390/app10072464openalex-snapshot
Execution Model to Reduce the Interference of Shared Memory in ARINC 653 Compliant Multicore RTOS
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