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Machine Learning Approaches for Efficient Design Space Exploration of Application-Specific NoCs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/s11227-016-1905-6openalex-snapshot
A heuristic clustering approach to use case-aware application-specific network-on-chip synthesis
inferredcites →https://doi.org/10.1038/nature24270openalex-snapshot
Mastering the game of Go without human knowledge
inferredcites →https://doi.org/10.1109/asap.2015.7245728openalex-snapshot
Noxim: An open, extensible and cycle-accurate network on chip simulator
inferredcites →https://doi.org/10.1109/bec.2010.5631145openalex-snapshot
Design space exploration and optimisation for NoC-based timing sensitive systems
inferredcites →https://doi.org/10.1109/fpl.2012.6339273openalex-snapshot
A framework for Open Tiled Manycore System-On-Chip
inferredcites →https://doi.org/10.1109/hpca.2003.1183551openalex-snapshot
Scalar operand networks: on-chip interconnect for ILP in partitioned architectures
inferredcites →https://doi.org/10.1109/ic3.2018.8530505openalex-snapshot
Machine Learning Based Framework to Predict Performance Evaluation of On-Chip Networks
inferredcites →https://doi.org/10.1109/iccad45719.2019.8942108openalex-snapshot
Proceedings of the 2019 International Conference on Computer-Aided Design (ICCAD)
inferredcites →https://doi.org/10.1109/ispass.2013.6557149openalex-snapshot
A detailed and flexible cycle-accurate Network-on-Chip simulator
inferredcites →https://doi.org/10.1109/isscc.2007.373606openalex-snapshot
An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS
inferredcites →https://doi.org/10.1109/les.2015.2402197openalex-snapshot
ORION3.0: A Comprehensive NoC Router Estimation Tool
inferredcites →https://doi.org/10.1109/nocs.2009.5071444openalex-snapshot
Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip
inferredcites →https://doi.org/10.1109/nocs.2012.16openalex-snapshot
Synthesis of NoC Interconnects for Custom MPSoC Architectures
inferredcites →https://doi.org/10.1109/sbesc.2016.038openalex-snapshot
Design Space Exploration Using UTNoCs and Genetic Algorithm
inferredcites →https://doi.org/10.1109/skg.2012.6openalex-snapshot
A Max-Plus Algebra Approach for Network-on-Chip End-to-End Delay Estimation
inferredcites →https://doi.org/10.1109/tcad.2005.844106openalex-snapshot
Energy- and performance-aware mapping for regular NoC architectures
inferredcites →https://doi.org/10.1109/tcad.2010.2061613openalex-snapshot
An Analytical Approach for Network-on-Chip Performance Analysis
inferredcites →https://doi.org/10.1109/tcad.2013.2272539openalex-snapshot
Architectural Exploration of Large-Scale Hierarchical Chip Multiprocessors
inferredcites →https://doi.org/10.1109/tcad.2014.2331556openalex-snapshot
Deterministic Synthesis of Hybrid Application-Specific Network-on-Chip Topologies
inferredcites →https://doi.org/10.1109/tciaig.2012.2186810openalex-snapshot
A Survey of Monte Carlo Tree Search Methods
inferredcites →https://doi.org/10.1109/tvlsi.2011.2178620openalex-snapshot
An Analytical Latency Model for Networks-on-Chip
inferredcites →https://doi.org/10.1145/1146909.1147058openalex-snapshot
Communication latency aware low power NoC synthesis
inferredcites →https://doi.org/10.1145/2228360.2228430openalex-snapshot
Explicit modeling of control and data for improved NoC router estimation
inferredcites →https://doi.org/10.1145/2742060.2742078openalex-snapshot
Reinforcement Learning for Thermal-aware Many-core Task Allocation
inferredcites →https://doi.org/10.1145/288548openalex-snapshot
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design - ICCAD '98
inferredcites →https://doi.org/10.1145/3073763.3073769openalex-snapshot
Model-based framework for networks-on-chip design space exploration
inferredcites →https://doi.org/10.1145/3139381openalex-snapshot
Graph-Grammar-Based IP-Integration (GRIP)—An EDA Tool for Software-Defined SoCs
inferredcites →https://doi.org/10.2307/1412159openalex-snapshot
The Proof and Measurement of Association between Two Things
inferredcites →https://doi.org/10.2307/1422689openalex-snapshot
The Proof and Measurement of Association between Two Things
inferredcites →https://doi.org/10.3115/v1/d14-1179openalex-snapshot
Learning Phrase Representations using RNN Encoder–Decoder for Statistical Machine Translation
inferredcites →https://doi.org/10.48550/arxiv.1412.3555openalex-snapshot
Empirical Evaluation of Gated Recurrent Neural Networks on Sequence Modeling
inferredcites →https://doi.org/10.48550/arxiv.1603.04467openalex-snapshot
TensorFlow: Large-Scale Machine Learning on Heterogeneous Distributed Systems
inferredcites →https://doi.org/10.48550/arxiv.1712.01815openalex-snapshot
Mastering Chess and Shogi by Self-Play with a General Reinforcement Learning Algorithm
inferredcites →https://doi.org/10.5555/1953048.2078195openalex-snapshot
Scikit-learn: Machine Learning in Python
inferredcites →https://doi.org/10.5555/2840819.2840917openalex-snapshot
Optimizing 3D NoC Design for Energy Efficiency: A Machine Learning Approach
inferredcites →https://doi.org/10.7873/date.2015.0066openalex-snapshot
Fast and Precise Cache Performance Estimation for Out-Of-Order Execution
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-04580-6_4openalex-snapshot
Automatic Search-Space Compression in System-Level Design Space Exploration Using Deep Generative Models
inferred← citeshttps://doi.org/10.1007/978-3-031-13074-8_1openalex-snapshot
ML for Design QoR Prediction
inferred← citeshttps://doi.org/10.1007/978-3-031-64285-2_13openalex-snapshot
A Graph Transformation-Based Engine for the Automated Exploration of Constraint Models
inferred← citeshttps://doi.org/10.1016/j.jpdc.2023.104778openalex-snapshot
A survey of machine learning for Network-on-Chips
inferred← citeshttps://doi.org/10.1088/1742-6596/1964/6/062009openalex-snapshot
A Design Space Exploration of VLSI Extreme Machine Learning
inferred← citeshttps://doi.org/10.1109/access.2025.3616179openalex-snapshot
Reinforcement Guided Genetic Algorithm for Application Mapping in Network-on-Chip Architectures: Toward Transparent and Efficient MPSoC Scheduling
inferred← citeshttps://doi.org/10.1109/access.2026.3659944openalex-snapshot
Ultra-Fast and Accurate Estimation of Large-Scale and Multi-Level Mesh-Based On-Chip Architectures Using Machine Learning and Multiprocessing
inferred← citeshttps://doi.org/10.1109/vlsisata61709.2024.10560345openalex-snapshot
LR-Based Performance Evaluation of MoCs
inferred← citeshttps://doi.org/10.1145/3607888openalex-snapshot
Proceedings of the 2023 International Conference on Hardware/Software Codesign and System Synthesis
inferred← citeshttps://doi.org/10.1145/3607888.3608962openalex-snapshot
Special Session: Machine Learning for Embedded System Design
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