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Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-540-87656-4_20openalex-snapshot
An Evolutionary Approach for Tuning Artificial Neural Network Parameters
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AutoML: A survey of the state-of-the-art
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The handbook of brain theory and neural networks
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RT-level ITC'99 benchmarks and first ATPG results
inferredcites →https://doi.org/10.1109/asianhost.2018.8607163openalex-snapshot
SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation
inferredcites →https://doi.org/10.1109/asianhost47458.2019.9006720openalex-snapshot
Sweep to the Secret: A Constant Propagation Attack on Logic Locking
inferredcites →https://doi.org/10.1109/host45689.2020.9300258openalex-snapshot
The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes
inferredcites →https://doi.org/10.1109/hst.2015.7140252openalex-snapshot
Evaluating the security of logic encryption algorithms
inferredcites →https://doi.org/10.1109/hst.2019.8741028openalex-snapshot
SURF: Joint Structural Functional Attack on Logic Locking
inferredcites →https://doi.org/10.1109/iccad45719.2019.8942134openalex-snapshot
GenUnlock: An Automated Genetic Algorithm Framework for Unlocking Logic Encryption
inferredcites →https://doi.org/10.1109/iscas.1989.100747openalex-snapshot
Combinational profiles of sequential benchmark circuits
inferredcites →https://doi.org/10.1109/isqed48828.2020.9136983openalex-snapshot
Strong Anti-SAT: Secure and Effective Logic Locking
inferredcites →https://doi.org/10.1109/itc-asia.2017.8097127openalex-snapshot
Enhancing security of logic encryption using embedded key generation unit
inferredcites →https://doi.org/10.1109/jproc.2014.2335155openalex-snapshot
A Primer on Hardware Security: Models, Methods, and Metrics
inferredcites →https://doi.org/10.1109/tnnls.2021.3084827openalex-snapshot
A Survey of Convolutional Neural Networks: Analysis, Applications, and Prospects
inferredcites →https://doi.org/10.1109/tvlsi.2019.2926114openalex-snapshot
The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology
inferredcites →https://doi.org/10.1109/vlsi-soc.2017.8203496openalex-snapshot
Evolution of logic locking
inferredcites →https://doi.org/10.1109/vts.2006.7openalex-snapshot
A Low-Cost Solution for Protecting IPs Against Scan-Based Side-Channel Attacks
inferredcites →https://doi.org/10.1109/vts.2019.8758671openalex-snapshot
Shielding Logic Locking from Redundancy Attacks
inferredcites →https://doi.org/10.1145/2228360.2228377openalex-snapshot
Security analysis of logic obfuscation
inferredcites →https://doi.org/10.1145/3060403.3060495openalex-snapshot
Comparative Analysis of Hardware Obfuscation for IP Protection
inferredcites →https://doi.org/10.1145/3287624.3288740openalex-snapshot
Machine learning and structural characteristics for reverse engineering
inferredcites →https://doi.org/10.1145/3299874.3318031openalex-snapshot
Deep RNN-Oriented Paradigm Shift through BOCANet
inferredcites →https://doi.org/10.1145/3378678.3391886openalex-snapshot
A secure hardware-software solution based on RISC-V, logic locking and microkernel
inferredcites →https://doi.org/10.1609/aaai.v31i1.11231openalex-snapshot
Inception-v4, Inception-ResNet and the Impact of Residual Connections on Learning
inferredcites →https://doi.org/10.2200/s00822ed1v01y201712cov015openalex-snapshot
A Guide to Convolutional Neural Networks for Computer Vision
inferredcites →https://doi.org/10.23919/date.2019.8714955openalex-snapshot
Piercing Logic Locking Keys through Redundancy Identification
inferredcites →https://doi.org/10.23919/date48585.2020.9116259openalex-snapshot
A Particle Swarm Optimization Guided Approximate Key Search Attack on Logic Locking in The Absence of Scan Access
inferredcites →https://doi.org/10.23919/date48585.2020.9116544openalex-snapshot
Estimating the Circuit De-obfuscation Runtime based on Graph Deep Learning
inferredcites →https://doi.org/10.4230/lipics.cp.2025.27openalex-snapshot
Relational inductive biases, deep learning, and graph networks
inferredcites →https://doi.org/10.46586/tches.v2020.i1.175-202openalex-snapshot
CAS-Lock: A Security-Corruptibility Trade-off Resilient Logic Locking Scheme
inferredcites →https://doi.org/10.48550/arxiv.1703.10187openalex-snapshot
Logic Locking for Secure Outsourced Chip Fabrication: A New Attack and Provably Secure Defense Mechanism
inferredcites →https://doi.org/10.48550/arxiv.1808.05377openalex-snapshot
Neural Architecture Search: A Survey
inferredcites →https://doi.org/10.48550/arxiv.1909.07426openalex-snapshot
TAAL: Tampering Attack on Any Key-based Logic Locked Circuits
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-030-81641-4_12openalex-snapshot
SANSCrypt: Sporadic-Authentication-Based Sequential Logic Encryption
inferred← citeshttps://doi.org/10.1007/978-3-030-99524-9_1openalex-snapshot
HOLL: Program Synthesis for Higher Order Logic Locking
inferred← citeshttps://doi.org/10.1007/978-3-031-19123-7_9openalex-snapshot
Security Evaluation with Machine Learning
inferred← citeshttps://doi.org/10.1007/978-3-031-37989-5_8openalex-snapshot
Post-satisfiability Era: Countermeasures and Threats
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Angriffe und Verschlüsselungen
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Sicherheitsbewertung mit maschinellem Lernen
inferred← citeshttps://doi.org/10.1007/978-3-031-58687-3_2openalex-snapshot
Advances in Logic Locking
inferred← citeshttps://doi.org/10.1007/978-3-031-71436-8_13openalex-snapshot
Machine Learning-Enhanced Analysis and Design for Trustworthy Integrated Circuits
inferred← citeshttps://doi.org/10.1007/s41635-024-00144-8openalex-snapshot
Machine Learning-Based Security Evaluation and Overhead Analysis of Logic Locking
inferred← citeshttps://doi.org/10.1007/s41635-025-00160-2openalex-snapshot
Uncertainty-Aware Unimodal and Multimodal Learning for Evolving Hardware Trojan Detection
inferred← citeshttps://doi.org/10.1016/j.cose.2023.103196openalex-snapshot
Logic locking for IP security: A comprehensive analysis on challenges, techniques, and trends
inferred← citeshttps://doi.org/10.1109/access.2024.3400624openalex-snapshot
Era of Sentinel Tech: Charting Hardware Security Landscapes Through Post-Silicon Innovation, Threat Mitigation and Future Trajectories
inferred← citeshttps://doi.org/10.1109/access.2025.3590967openalex-snapshot
TOP: A Combined Logical and Physical Obfuscation Method for Securing Networks-on-Chip Against Reverse Engineering Attacks
inferred← citeshttps://doi.org/10.1109/access.2025.3612444openalex-snapshot
OptiLock: Automated Optimization of Learning-Resilient Logic Locking
inferred← citeshttps://doi.org/10.1109/asp-dac58780.2024.10473877openalex-snapshot
LOOPLock 3.0: A Robust Cyclic Logic Locking Approach
inferred← citeshttps://doi.org/10.1109/asp-dac58780.2024.10473982openalex-snapshot
LIPSTICK: Corruptibility-Aware and Explainable Graph Neural Network-based Oracle-Less Attack on Logic Locking
inferred← citeshttps://doi.org/10.1109/asp-dac66049.2026.11420328openalex-snapshot
GALA: An Explainable GNN-based Approach for Enhancing Oracle-Less Logic Locking Attacks Using Functional and Behavioral Features
inferred← citeshttps://doi.org/10.1109/calcon63337.2024.10914248openalex-snapshot
Random Logic Locking with Enhanced Resilience against SAT Attacks
inferred← citeshttps://doi.org/10.1109/dac56929.2023.10247822openalex-snapshot
SimLL: Similarity-Based Logic Locking Against Machine Learning Attacks
inferred← citeshttps://doi.org/10.1109/dac56929.2023.10247921openalex-snapshot
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning
inferred← citeshttps://doi.org/10.1109/dac63849.2025.11132623openalex-snapshot
SCONE: A Logic Locking Technique Utilizing SMT Solver and Circuit Encoding Scheme for Efficient Hardware IP Protection
inferred← citeshttps://doi.org/10.1109/dsn-s58398.2023.00055openalex-snapshot
AutoLock: Automatic Design of Logic Locking with Evolutionary Computation
inferred← citeshttps://doi.org/10.1109/ets61313.2024.10567311openalex-snapshot
Power Analysis Attack Against post-SAT Logic Locking schemes
inferred← citeshttps://doi.org/10.1109/iccad51958.2021.9643476openalex-snapshot
UNTANGLE: Unlocking Routing and Logic Obfuscation Using Graph Neural Networks-based Link Prediction
inferred← citeshttps://doi.org/10.1109/iccad51958.2021.9643498openalex-snapshot
ReIGNN: State Register Identification Using Graph Neural Networks for Circuit Reverse Engineering
inferred← citeshttps://doi.org/10.1109/iccad57390.2023.10323655openalex-snapshot
Risk-Aware and Explainable Framework for Ensuring Guaranteed Coverage in Evolving Hardware Trojan Detection
inferred← citeshttps://doi.org/10.1109/icce-taiwan66881.2025.11207881openalex-snapshot
A Machine Learning-Based Approach to Attacking Obfuscated Finite State Machines
inferred← citeshttps://doi.org/10.1109/iemcon53756.2021.9623118openalex-snapshot
Developing Attack Resilience in Y86 Processor using Logic Locking
inferred← citeshttps://doi.org/10.1109/iscas46773.2023.10182222openalex-snapshot
DeepAttack: A Deep Learning Based Oracle-less Attack on Logic Locking
inferred← citeshttps://doi.org/10.1109/iscas56072.2025.11043708openalex-snapshot
N-MUX: Neighborhood-Based Logic Locking Against Machine Learning Attacks
inferred← citeshttps://doi.org/10.1109/isqed57927.2023.10129342openalex-snapshot
Low Overhead System-Level Obfuscation through Hardware Resource Sharing
inferred← citeshttps://doi.org/10.1109/isqed57927.2023.10129346openalex-snapshot
Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP
inferred← citeshttps://doi.org/10.1109/isqed60706.2024.10528687openalex-snapshot
DECOR: Enhancing Logic Locking Against Machine Learning-Based Attacks
inferred← citeshttps://doi.org/10.1109/isqed65160.2025.11014457openalex-snapshot
The Impact of Logic Locking on Confidentiality: An Automated Evaluation
inferred← citeshttps://doi.org/10.1109/itc-asia62534.2024.10661361openalex-snapshot
NoBALL: A Novel BDD-based Attack against Logic Locking
inferred← citeshttps://doi.org/10.1109/itc50671.2022.00081openalex-snapshot
AI-Driven Assurance of Hardware IP against Reverse Engineering Attacks
inferred← citeshttps://doi.org/10.1109/mdat.2026.3667081openalex-snapshot
Residual Structural Traces in Logic Locking: Insights From Redundancy Analysis and Beyond
inferred← citeshttps://doi.org/10.1109/mis.2024.3430263openalex-snapshot
GNNReveal: A Novel Graph-Neural-Network-Based Attack Method for Integrated Circuit Logic Gate Decamouflaging
inferred← citeshttps://doi.org/10.1109/tcad.2021.3100275openalex-snapshot
Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks
inferred← citeshttps://doi.org/10.1109/tcad.2021.3111550openalex-snapshot
Digitally Assisted Mixed-Signal Circuit Security
inferred← citeshttps://doi.org/10.1109/tcad.2022.3192793openalex-snapshot
Redundancy Attack: Breaking Logic Locking Through Oracleless Rationality Analysis
inferred← citeshttps://doi.org/10.1109/tcad.2022.3231174openalex-snapshot
RESCUE: Resilient, Scalable, High-Corruption, Compact-Key-Set Locking Framework
inferred← citeshttps://doi.org/10.1109/tcad.2023.3240933openalex-snapshot
Complexity Analysis of the SAT Attack on Logic Locking
inferred← citeshttps://doi.org/10.1109/tcsi.2025.3565155openalex-snapshot
SecureX: Strategically Securing Designs Against Oracle-Less Attacks Using GNN-Based Explainers
inferred← citeshttps://doi.org/10.1109/tcsii.2021.3113035openalex-snapshot
OMLA: An Oracle-Less Machine Learning-Based Attack on Logic Locking
inferred← citeshttps://doi.org/10.1109/tcsii.2023.3335861openalex-snapshot
Concealing Exposed Circuit Features Through a MaxSAT-Based Logic Locking Method
inferred← citeshttps://doi.org/10.1109/tifs.2021.3096028openalex-snapshot
SAIL: Analyzing Structural Artifacts of Logic Locking Using Machine Learning
inferred← citeshttps://doi.org/10.1109/tifs.2022.3218429openalex-snapshot
Titan: Security Analysis of Large-Scale Hardware Obfuscation Using Graph Neural Networks
inferred← citeshttps://doi.org/10.1109/tifs.2024.3431991openalex-snapshot
Thwarting GNN-Based Attacks Against Logic Locking
inferred← citeshttps://doi.org/10.1109/tifs.2024.3515855openalex-snapshot
X-DFS: Explainable Artificial Intelligence Guided Design-for-Security Solution Space Exploration
inferred← citeshttps://doi.org/10.1109/tvlsi.2021.3074004openalex-snapshot
ASSURE: RTL Locking Against an Untrusted Foundry
inferred← citeshttps://doi.org/10.1109/tvlsi.2024.3360240openalex-snapshot
Reliable Hardware Watermarks for Deep Learning Systems
inferred← citeshttps://doi.org/10.1109/vlsi-soc53125.2021.9606979openalex-snapshot
Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities
inferred← citeshttps://doi.org/10.1109/vlsi-soc53125.2021.9606998openalex-snapshot
Trustworthy Hardware Design with Logic Locking
inferred← citeshttps://doi.org/10.1109/vlsi-soc62099.2024.10767809openalex-snapshot
The Impact of Logic Synthesis and Technology Mapping on Logic Locking Security
inferred← citeshttps://doi.org/10.1109/vts65138.2025.11022851openalex-snapshot
GLLaMoR: Graph-based Logic Locking by Large Language Models for Enhanced Robustness
inferred← citeshttps://doi.org/10.1145/3489517.3530541openalex-snapshot
Designing ML-resilient locking at register-transfer level
inferred← citeshttps://doi.org/10.1145/3508352.3561096openalex-snapshot
Embracing Graph Neural Networks for Hardware Security
inferred← citeshttps://doi.org/10.1145/3508352.3561103openalex-snapshot
Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool
inferred← citeshttps://doi.org/10.1145/3508352.3561117openalex-snapshot
Reconfigurable Logic for Hardware IP Protection
inferred← citeshttps://doi.org/10.1145/3563391openalex-snapshot
A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation
inferred← citeshttps://doi.org/10.1145/3577200openalex-snapshot
High-Level Approaches to Hardware Security: A Tutorial
inferred← citeshttps://doi.org/10.1145/3583781.3590219openalex-snapshot
CoLA: Convolutional Neural Network Model for Secure Low Overhead Logic Locking Assignment
inferred← citeshttps://doi.org/10.1145/3609107openalex-snapshot
ObNoCs : Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks
inferred← citeshttps://doi.org/10.1145/3658617.3697762openalex-snapshot
NoXLock: SiP Activation and Licensing through Obfuscated on-Chip Network and Fuzzy Traffic
inferred← citeshttps://doi.org/10.1145/3737287openalex-snapshot
ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction
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PARS: A Layered Hardware Obfuscation Platform for Resilience and Secure Collaborative Multi-Module Designs
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Structurally Secure Obfuscation: Assessing and Mitigating Structural Vulnerabilities in Circuits Obfuscation
inferred← citeshttps://doi.org/10.1145/3787109.3815221openalex-snapshot
Generalized Structural Bias Analysis for Corrupt-and-Correct Logic Locking
inferred← citeshttps://doi.org/10.1145/3787109.3815258openalex-snapshot
EAGEL: Explainable And Generalized Structural Exploitation Against Logic Locking
inferred← citeshttps://doi.org/10.1145/3816044openalex-snapshot
Toward Enhanced Hardware IP Security: Community Evaluation of Logic Locking, State Space Transformation, Redaction, and NoC Routing Table Configuration
inferred← citeshttps://doi.org/10.1587/elex.22.20250229openalex-snapshot
DCLL: Depth-coupling based approach on logic locking
inferred← citeshttps://doi.org/10.21275/ms2401093118openalex-snapshot
Evaluation of Logic Locking Schemes Against Oracle-Less Machine Learning Attacks at the RTL Level
inferred← citeshttps://doi.org/10.2139/ssrn.5736034openalex-snapshot
ScanCamouflage+: Physical-Design-Aware Scan Chain Obfuscation with Camouflaged Sequential and Logic Gates
inferred← citeshttps://doi.org/10.23919/date51398.2021.9474132openalex-snapshot
Vertical IP Protection of the Next-Generation Devices: Quo Vadis?
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774602openalex-snapshot
A Composable Design Space Exploration Framework to Optimize Behavioral Locking
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774603openalex-snapshot
MuxLink: Circumventing Learning-Resilient MUX-Locking Using Graph Neural Network-based Link Prediction
inferred← citeshttps://doi.org/10.23919/date56975.2023.10137136openalex-snapshot
RTLock: IP Protection using Scan-Aware Logic Locking at RTL
inferred← citeshttps://doi.org/10.23919/date56975.2023.10137322openalex-snapshot
EvoLUTe: Evaluation of Look-Up-Table-based Fine-Grained IP Redaction
inferred← citeshttps://doi.org/10.32657/10356/181494openalex-snapshot
Machine learning for high-dimensional data analysis in hardware assurance applications
inferred← citeshttps://doi.org/10.3390/electronics11233906openalex-snapshot
SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption
inferred← citeshttps://doi.org/10.36227/techrxiv.20036924openalex-snapshot
Post-Quantum Logic Locking
inferred← citeshttps://doi.org/10.36227/techrxiv.20036924.v1openalex-snapshot
Post-Quantum Logic Locking
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A Survey on RISC-V Security: Hardware and Architecture
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