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Mitigating Voltage Attacks in Multi-Tenant FPGAs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1049/el.2019.0163openalex-snapshot
Oscillator without a combinatorial loop and its threat to FPGA in data centre
inferredcites →https://doi.org/10.1109/asscc.2009.5357189openalex-snapshot
On-die parameter extraction from path-delay measurements
inferredcites →https://doi.org/10.1109/cloud.2016.0013openalex-snapshot
RC3E: Reconfigurable Accelerators in Data Centres and Their Provision by Adapted Service Models
inferredcites →https://doi.org/10.1109/cloud16188.2009openalex-snapshot
2009 IEEE International Conference on Cloud Computing
inferredcites →https://doi.org/10.1109/fccm.2010.43openalex-snapshot
Using the Power Side Channel of FPGAs for Communication
inferredcites →https://doi.org/10.1109/fccm.2017.22openalex-snapshot
Energy Efficient Loop Unrolling for Low-Cost FPGAs
inferredcites →https://doi.org/10.1109/fccm.2019.00044openalex-snapshot
Fast Voltage Transients on FPGAs: Impact and Mitigation Strategies
inferredcites →https://doi.org/10.1109/fccm48280.2020.00018openalex-snapshot
Power-hammering through Glitch Amplification – Attacks and Mitigation
inferredcites →https://doi.org/10.1109/fdtc.2019.00015openalex-snapshot
RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions
inferredcites →https://doi.org/10.1109/fpl.2019.00017openalex-snapshot
Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs
inferredcites →https://doi.org/10.1109/fpl.2019.00038openalex-snapshot
Characterizing Power Distribution Attacks in Multi-User FPGA Environments
inferredcites →https://doi.org/10.1109/fpl50879.2020.00046openalex-snapshot
Power Wasting Circuits for Cloud FPGA Attacks
inferredcites →https://doi.org/10.1109/fpt.2016.7929182openalex-snapshot
Analysis of transient voltage fluctuations in FPGAs
inferredcites →https://doi.org/10.1109/fpt30984.2013openalex-snapshot
2013 International Conference on Field-Programmable Technology (FPT)
inferredcites →https://doi.org/10.1109/iccd46524.2019.00010openalex-snapshot
Reading Between the Dies: Cross-SLR Covert Channels on Multi-Tenant Cloud FPGAs
inferredcites →https://doi.org/10.1109/iscas.2014.6865698openalex-snapshot
Delay-line temperature sensors and VLSI thermal management demonstrated on a 60nm FPGA
inferredcites →https://doi.org/10.1109/sp.2018.00049openalex-snapshot
FPGA-Based Remote Power Side-Channel Attacks
inferredcites →https://doi.org/10.1109/sp35280.2016openalex-snapshot
2016 IEEE Symposium on Security and Privacy (SP)
inferredcites →https://doi.org/10.1109/tcad.2005.852293openalex-snapshot
Power modeling and characteristics of field programmable gate arrays
inferredcites →https://doi.org/10.1109/tcad.2015.2512905openalex-snapshot
Built-In Self-Heating Thermal Testing of FPGAs
inferredcites →https://doi.org/10.1109/tvlsi.2018.2848460openalex-snapshot
An Experimental Evaluation and Analysis of Transient Voltage Fluctuations in FPGAs
inferredcites →https://doi.org/10.1145/1723112.1723153openalex-snapshot
On-line sensing for healthier FPGA systems
inferredcites →https://doi.org/10.1145/2133352.2133353openalex-snapshot
Low-cost sensing with ring oscillator arrays for healthier reconfigurable systems
inferredcites →https://doi.org/10.1145/2435264.2435283openalex-snapshot
Sensing nanosecond-scale voltage attacks and natural transients in FPGAs
inferredcites →https://doi.org/10.1145/3328222openalex-snapshot
Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the Cloud
inferredcites →https://doi.org/10.1145/611817.611844openalex-snapshot
Architecture evaluation for power-efficient FPGAs
inferredcites →https://doi.org/10.23919/date.2018.8342177openalex-snapshot
An inside job: Remote power analysis attacks on FPGAs
inferredcites →https://doi.org/10.23919/date.2019.8715263openalex-snapshot
Timing Violation Induced Faults in Multi-Tenant FPGAs
inferredcites →https://doi.org/10.23919/fpl.2017.8056840openalex-snapshot
Voltage drop-based fault attacks on FPGAs using valid bitstreams
inferredcites →https://doi.org/10.46586/tches.v2018.i3.44-68openalex-snapshot
FPGAhammer: Remote Voltage Fault Attacks on Shared FPGAs, suitable for DFA on AES
inferredcites →https://doi.org/10.5555/3291168.3291177openalex-snapshot
Sharing, protection, and compatibility for reconfigurable fabric with Amorphos
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-45395-3_10openalex-snapshot
Countermeasures Against Voltage Attacks in Multi-tenant FPGAs
inferred← citeshttps://doi.org/10.1007/978-3-031-45395-3_4openalex-snapshot
Remote Physical Attacks on FPGAs at the Electrical Level
inferred← citeshttps://doi.org/10.1007/978-3-031-45395-3_6openalex-snapshot
Contention-Based Threats Between Single-Tenant Cloud FPGA Instances
inferred← citeshttps://doi.org/10.1007/978-3-031-45395-3_7openalex-snapshot
Cross-board Power-Based FPGA, CPU, and GPU Covert Channels
inferred← citeshttps://doi.org/10.1109/asianhost59942.2023.10409460openalex-snapshot
AHD-LAM: A New Mitigation Method against Voltage-Drop Attacks in Multi-tenant FPGAs
inferred← citeshttps://doi.org/10.1109/ats64447.2024.10915413openalex-snapshot
Hacking the Fabric: Targeting Partial Reconfiguration for Fault Injection in FPGA Fabrics
inferred← citeshttps://doi.org/10.1109/dsd64264.2024.00055openalex-snapshot
Circuit Disguise: Detecting Malicious Circuits in Cloud FPGAs without IP Disclosure
inferred← citeshttps://doi.org/10.1109/fpl57034.2022.00066openalex-snapshot
Breaking an FPGA-Integrated NIST SP 800-193 Compliant TRNG Hard-IP Core with On-Chip Voltage-Based Fault Attacks
inferred← citeshttps://doi.org/10.1109/host68814.2026.11604695openalex-snapshot
SnoopyPower! Remote Power Attacks on Cache and Coherence Paths
inferred← citeshttps://doi.org/10.1109/iccad51958.2021.9643485openalex-snapshot
LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs
inferred← citeshttps://doi.org/10.1109/iscas56072.2025.11043985openalex-snapshot
An On-chip Sensor Placement Strategy For Mitigation Framework Against Voltage-Drop Attack
inferred← citeshttps://doi.org/10.1109/jproc.2023.3330729openalex-snapshot
A Visionary Look at the Security of Reconfigurable Cloud Computing
inferred← citeshttps://doi.org/10.1109/lats70329.2026.11480311openalex-snapshot
PowerCourt: Formally Judging Benign-Looking Circuits in Multi-Tenant FPGA Environments
inferred← citeshttps://doi.org/10.1109/mdat.2022.3151022openalex-snapshot
Remote Fault Attacks in Multitenant Cloud FPGAs
inferred← citeshttps://doi.org/10.1109/paine62042.2024.10792722openalex-snapshot
In-Situ FPGA Fault Injection with Short-Circuits
inferred← citeshttps://doi.org/10.1109/tcad.2024.3443769openalex-snapshot
Meta-Scanner: Detecting Fault Attacks via Scanning FPGA Designs Metadata
inferred← citeshttps://doi.org/10.1109/tcc.2026.3698470openalex-snapshot
Toward FPGA Cloud Security: A Ring Oscillator-Free and Low-Power Attack Circuit
inferred← citeshttps://doi.org/10.1109/tdsc.2025.3550568openalex-snapshot
A Covert and Efficient Attack on FPGA Cloud Based on Adaptive RON
inferred← citeshttps://doi.org/10.1145/3534972openalex-snapshot
Cross-VM Covert- and Side-Channel Attacks in Cloud FPGAs
inferred← citeshttps://doi.org/10.1145/3583781.3590246openalex-snapshot
Fault Recovery from Multi-Tenant FPGA Voltage Attacks
inferred← citeshttps://doi.org/10.1145/3633204openalex-snapshot
On the Malicious Potential of Xilinx’s Internal Configuration Access Port (ICAP)
inferred← citeshttps://doi.org/10.1145/3635312openalex-snapshot
Covert-channels in FPGA-enabled SmartSSDs
inferred← citeshttps://doi.org/10.1145/3676536.3676843openalex-snapshot
DoS-FPGA: Denial of Service on Cloud FPGAs via Coordinated Power Hammering
inferred← citeshttps://doi.org/10.1145/3716502openalex-snapshot
A New Dynamic Countermeasure to Strengthen Design Obfuscation in FPGAs
inferred← citeshttps://doi.org/10.1145/3735556openalex-snapshot
Do Not Trust Power Management: A Survey on Internal Energy-based Attacks Circumventing Trusted Execution Environments Security Properties
inferred← citeshttps://doi.org/10.1145/3756013openalex-snapshot
S 2 FAM: Signal-slowdown-based Fault Attack Mitigation Method for Secure Multi-tenant FPGA
inferred← citeshttps://doi.org/10.3390/s23042081openalex-snapshot
Covert Channel Communication as an Emerging Security Threat in 2.5D/3D Integrated Systems
inferred← citeshttps://doi.org/10.3390/s24237780openalex-snapshot
Si APD-Based High Speed Infrared Radiation Thermometry for Analysing the Temperature Instability of a Combustion Chamber
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