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Cross-VM Covert- and Side-Channel Attacks in Cloud FPGAs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/3-540-63465-7_212openalex-snapshot
Thermal monitoring on FPGAs using ring-oscillators
inferredcites →https://doi.org/10.1007/978-3-662-53140-2_21openalex-snapshot
Run-Time Accessible DRAM PUFs in Commodity Devices
inferredcites →https://doi.org/10.1016/j.micpro.2013.12.001openalex-snapshot
Seven recipes for setting your FPGA on fire – A cookbook on heat generators
inferredcites →https://doi.org/10.1049/el.2019.0163openalex-snapshot
Oscillator without a combinatorial loop and its threat to FPGA in data centre
inferredcites →https://doi.org/10.1109/54.825679openalex-snapshot
Thermal testing on reconfigurable computers
inferredcites →https://doi.org/10.1109/ddecs.2008.4538777openalex-snapshot
Modeling and observing the jitter in ring oscillators implemented in FPGAs
inferredcites →https://doi.org/10.1109/fccm51124.2021.00035openalex-snapshot
Cloud FPGA Cartography using PCIe Contention
inferredcites →https://doi.org/10.1109/fccm51124.2021.00037openalex-snapshot
Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs
inferredcites →https://doi.org/10.1109/fdtc.2019.00015openalex-snapshot
RAM-Jam: Remote Temperature and Voltage Fault Attack on FPGAs using Memory Collisions
inferredcites →https://doi.org/10.1109/fpl.2014.6927390openalex-snapshot
Aging effects in FPGAs: an experimental analysis
inferredcites →https://doi.org/10.1109/fpl.2019.00017openalex-snapshot
Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs
inferredcites →https://doi.org/10.1109/fpl.2019.00039openalex-snapshot
Physical Side-Channel Attacks and Covert Communication on FPGAs: A Survey
inferredcites →https://doi.org/10.1109/host49136.2021.9702277openalex-snapshot
Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments
inferredcites →https://doi.org/10.1109/iccd46524.2019.00010openalex-snapshot
Reading Between the Dies: Cross-SLR Covert Channels on Multi-Tenant Cloud FPGAs
inferredcites →https://doi.org/10.1109/icfpt51103.2020.00023openalex-snapshot
Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs
inferredcites →https://doi.org/10.1109/icfpt51103.2020.00029openalex-snapshot
Cloud FPGA Security with RO-Based Primitives
inferredcites →https://doi.org/10.1109/ipdps.2009.5161068openalex-snapshot
Exploring the multiple-GPU design space
inferredcites →https://doi.org/10.1109/ipdpsw.2016.44openalex-snapshot
Topology-Aware GPU Selection on Multi-GPU Nodes
inferredcites →https://doi.org/10.1109/isvlsi51109.2021.00059openalex-snapshot
A Survey of Recent Attacks and Mitigation on FPGA Systems
inferredcites →https://doi.org/10.1109/lca.2019.2955119openalex-snapshot
Priority-Based PCIe Scheduling for Multi-Tenant Multi-GPU Systems
inferredcites →https://doi.org/10.1109/sp40000.2020.00070openalex-snapshot
C 3 APSULe: Cross-FPGA Covert-Channel Attacks through Power Supply Unit Leakage
inferredcites →https://doi.org/10.1109/sp40001.2021.00059openalex-snapshot
Invisible Probe: Timing Attacks with PCIe Congestion Side-channel
inferredcites →https://doi.org/10.1109/tcapt.2002.808011openalex-snapshot
Dynamically inserting, operating, and eliminating thermal sensors of FPGA-based systems
inferredcites →https://doi.org/10.1109/tcc.2020.2992548openalex-snapshot
When FPGA Meets Cloud: A First Look at Performance
inferredcites →https://doi.org/10.1109/tifs.2021.3106169openalex-snapshot
Stealing Neural Network Structure Through Remote FPGA Side-Channel Analysis
inferredcites →https://doi.org/10.1109/tvlsi.2020.3027711openalex-snapshot
Power Distribution Attacks in Multitenant FPGAs
inferredcites →https://doi.org/10.1145/1687399openalex-snapshot
Proceedings of the 2009 International Conference on Computer-Aided Design
inferredcites →https://doi.org/10.1145/1735688.1735702openalex-snapshot
The Scalable Heterogeneous Computing (SHOC) benchmark suite
inferredcites →https://doi.org/10.1145/1964179.1964194openalex-snapshot
Quantifying NUMA and contention effects in multi-GPU systems
inferredcites →https://doi.org/10.1145/3289602.3293920openalex-snapshot
Temporal Thermal Covert Channels in Cloud FPGAs
inferredcites →https://doi.org/10.1145/3328222openalex-snapshot
Mitigating Electrical-level Attacks towards Secure Multi-Tenant FPGAs in the Cloud
inferredcites →https://doi.org/10.1145/3340557openalex-snapshot
Recent Attacks and Defenses on FPGA-based Systems
inferredcites →https://doi.org/10.1145/3373087.3375322openalex-snapshot
Fingerprinting Cloud FPGA Infrastructures
inferredcites →https://doi.org/10.1145/3400302.3415695openalex-snapshot
Information leakage from FPGA routing and logic elements
inferredcites →https://doi.org/10.1145/3451236openalex-snapshot
Mitigating Voltage Attacks in Multi-Tenant FPGAs
inferredcites →https://doi.org/10.23919/date.2019.8714882openalex-snapshot
Spying on Temperature using DRAM
inferredcites →https://doi.org/10.23919/date48585.2020.9116481openalex-snapshot
Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?
inferredcites →https://doi.org/10.23919/date51398.2021.9473915openalex-snapshot
Remote Power Side-Channel Attacks on BNN Accelerators in FPGAs
inferredcites →https://doi.org/10.23919/date51398.2021.9473947openalex-snapshot
Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks
inferredcites →https://doi.org/10.23919/fpl.2017.8056840openalex-snapshot
Voltage drop-based fault attacks on FPGAs using valid bitstreams
inferredcites →https://doi.org/10.46586/tches.v2021.i3.441-464openalex-snapshot
Denial-of-Service on FPGA-based Cloud Infrastructures — Attack and Defense
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-45395-3_9openalex-snapshot
Fingerprinting and Mapping Cloud FPGA Infrastructures
inferred← citeshttps://doi.org/10.1007/978-3-031-97620-9_10openalex-snapshot
The HMB Timing Side Channel: Exploiting the SSD’s Host Memory Buffer
inferred← citeshttps://doi.org/10.1007/978-981-92-3012-9_17openalex-snapshot
Shielding MCP Tool: A Secure Execution Framework Using TEE and Automated Trimming
inferred← citeshttps://doi.org/10.1007/s41635-022-00130-yopenalex-snapshot
FPGA Design Deobfuscation by Iterative LUT Modification at Bitstream Level
inferred← citeshttps://doi.org/10.1109/access.2024.3353134openalex-snapshot
X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs
inferred← citeshttps://doi.org/10.1109/bdpc63545.2025.11135800openalex-snapshot
Network service process amouflage method for multidimensional trusted assessment in cloud virtualization environments
inferred← citeshttps://doi.org/10.1109/cloud62652.2024.00038openalex-snapshot
S2TAR: Shared Secure Trusted Accelerators with Reconfiguration for Machine Learning in the Cloud
inferred← citeshttps://doi.org/10.1109/icfpt59805.2023.00007openalex-snapshot
A Tenant Side Compilation Solution for Cloud FPGA Deployment
inferred← citeshttps://doi.org/10.1109/ictc55196.2022.9952853openalex-snapshot
PCIe Side-channel Attack on I/O Device via RDMA-enabled Network Card
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00091openalex-snapshot
DarkStream: Exploiting Internal Throughput Contention in Data Streaming Accelerator for Timing Attacks
inferred← citeshttps://doi.org/10.1109/srds55811.2022.00015openalex-snapshot
An Investigation on Data Center Cooling Systems Using FPGA-based Temperature Side Channels
inferred← citeshttps://doi.org/10.1109/tifs.2023.3271252openalex-snapshot
Abusing Commodity DRAMs in IoT Devices to Remotely Spy on Temperature
inferred← citeshttps://doi.org/10.1145/3576915.3616606openalex-snapshot
Gotcha! I Know What You Are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links
inferred← citeshttps://doi.org/10.1145/3635312openalex-snapshot
Covert-channels in FPGA-enabled SmartSSDs
inferred← citeshttps://doi.org/10.1145/3658617.3697767openalex-snapshot
Through Fabric: A Cross-world Thermal Covert Channel on TEE-enhanced FPGA-MPSoC Systems
inferred← citeshttps://doi.org/10.1145/3666092openalex-snapshot
Turn on, Tune in, and Listen up: Maximizing Side-Channel Recovery in Cross-Platform Time-to-Digital Converters
inferred← citeshttps://doi.org/10.1145/3706628.3708826openalex-snapshot
CIVIC-FPGA: A Trusted FPGA Design Validation by Multi-Tenant Cloud Providers
inferred← citeshttps://doi.org/10.1145/3719027.3765069openalex-snapshot
BOLT: Bandwidth-Optimized Lightning-Fast Oblivious Map powered by Secure HBM Accelerators
inferred← citeshttps://doi.org/10.23919/ccc64809.2025.11178297openalex-snapshot
Data Filtering Query Acceleration Architecture Based on FPGA
inferred← citeshttps://doi.org/10.5753/sscad.2024.244780openalex-snapshot
A Modular Architecture and a Cost-Model to Estimate the Overhead of Implementing Confidentiality in Cloud Computing Environments
inferred← citeshttps://doi.org/10.71229/v37bk664openalex-snapshot
Adversarial Latency Watermarking: Covertly Encoding Zero Bit Keys in Federated Learning Model Updates
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