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AutoScaleDSE: A Scalable Design Space Exploration Engine for High-Level Synthesis

https://doi.org/10.1145/3572959
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-030-91608-4_52openalex-snapshot
Chimera: A Hybrid Machine Learning-Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesis
inferredcites →https://doi.org/10.1007/978-81-322-1958-3_5openalex-snapshot
Design Space Exploration for Scheduling and Allocation in High Level Synthesis of Datapaths
inferredcites →https://doi.org/10.1007/bf02551274openalex-snapshot
Approximation by superpositions of a sigmoidal function
inferredcites →https://doi.org/10.1016/s0898-1221(96)90463-0openalex-snapshot
Advances in neural information processing systems 7
inferredcites →https://doi.org/10.1109/5.726791openalex-snapshot
Gradient-based learning applied to document recognition
inferredcites →https://doi.org/10.1109/asicon.2011.6157401openalex-snapshot
A study of high-level synthesis: Promises and challenges
inferredcites →https://doi.org/10.1109/asicon.2013.6811982openalex-snapshot
Genetic Algorithm based pipeline scheduling in high-level synthesis
inferredcites →https://doi.org/10.1109/aspdac.2005.1466475openalex-snapshot
Optimal module and voltage assignment for low-power
inferredcites →https://doi.org/10.1109/dac18072.2020.9218684openalex-snapshot
HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation
inferredcites →https://doi.org/10.1109/fccm.2011.29openalex-snapshot
Multilevel Granularity Parallelism Synthesis on FPGAs
inferredcites →https://doi.org/10.1109/fccm.2018.00023openalex-snapshot
Understanding Performance Differences of FPGAs and GPUs
inferredcites →https://doi.org/10.1109/iccad.2017.8203809openalex-snapshot
COMBA: A comprehensive model-based analysis framework for high level synthesis of real applications
inferredcites →https://doi.org/10.1109/iccad45719.2019.8942177openalex-snapshot
What You Simulate Is What You Synthesize: Designing a Processor Core from C++ Specifications
inferredcites →https://doi.org/10.1109/icdar.1995.598994openalex-snapshot
Random decision forests
inferredcites →https://doi.org/10.1109/iiswc.2014.6983050openalex-snapshot
MachSuite: Benchmarks for accelerator design and customized architectures
inferredcites →https://doi.org/10.1109/isca.2014.6853234openalex-snapshot
Single-graph multiple flows: Energy efficient design alternative for GPGPUs
inferredcites →https://doi.org/10.1109/isvlsi.2008.73openalex-snapshot
A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis
inferredcites →https://doi.org/10.1109/mcom.2019.1800819openalex-snapshot
Deep Learning for Encrypted Traffic Classification: An Overview
inferredcites →https://doi.org/10.1109/mcse.2010.69openalex-snapshot
OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems
inferredcites →https://doi.org/10.1109/sasp.2009.5226333openalex-snapshot
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
inferredcites →https://doi.org/10.1109/sfcs.1983.7openalex-snapshot
Approximation algorithms for NP-complete problems on planar graphs
inferredcites →https://doi.org/10.1109/tcad.2019.2943570openalex-snapshot
High-Level Synthesis Design Space Exploration: Past, Present, and Future
inferredcites →https://doi.org/10.1109/tvlsi.2009.2013353openalex-snapshot
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
inferredcites →https://doi.org/10.1145/2145816.2145818openalex-snapshot
Scalable framework for mapping streaming applications onto multi-GPU systems
inferredcites →https://doi.org/10.1145/2847263.2847274openalex-snapshot
High Level Synthesis of Complex Applications
inferredcites →https://doi.org/10.1145/3431920.3439290openalex-snapshot
ThunderGP
inferredcites →https://doi.org/10.1145/3494534openalex-snapshot
AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators
inferredcites →https://doi.org/10.1145/76263.76337openalex-snapshot
More iteration space tiling
inferredcites →https://doi.org/10.2312/eggh/eggh08/047-055openalex-snapshot
All-Pairs Shortest-Paths for Large Graphs on the GPU
inferredcites →https://doi.org/10.23919/fpl.2017.8056810openalex-snapshot
Tile size selection for optimized memory reuse in high-level synthesis
inferredcites →https://doi.org/10.5555/1953048.2078195openalex-snapshot
Scikit-learn: Machine Learning in Python
inferredcites →https://doi.org/10.7873/date.2015.0199openalex-snapshot
Exploiting Loop-Array Dependencies to Accelerate the Design Space Exploration with High Level Synthesis

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/s11265-024-01938-3openalex-snapshot
Memory Aware Design Optimisation for High-Level Synthesis
inferred← citeshttps://doi.org/10.1016/j.micpro.2026.105351openalex-snapshot
GENIO: A Genetic Programming framework for structural design space exploration of HLS image pipelines
inferred← citeshttps://doi.org/10.1016/j.vlsi.2025.102513openalex-snapshot
A systematic review of machine learning-driven design space exploration in high-level synthesis
inferred← citeshttps://doi.org/10.1016/j.vlsi.2026.102878openalex-snapshot
High Level Synthesis in the Agentic Era
inferred← citeshttps://doi.org/10.1109/access.2025.3605852openalex-snapshot
AnnotationGym: A Generic Framework for Automatic Source Code Annotation
inferred← citeshttps://doi.org/10.1109/asap65064.2025.00013openalex-snapshot
Cryptonite: Scalable Accelerator Design for Cryptographic Primitives and Algorithms
inferred← citeshttps://doi.org/10.1109/asp-dac66049.2026.11420389openalex-snapshot
FESTAL: Dataflow Accelerator Synthesis Framework with Graph-Based Fusion for FPGA
inferred← citeshttps://doi.org/10.1109/dac56929.2023.10247880openalex-snapshot
Lightning Talk: The Next Wave of High-level Synthesis
inferred← citeshttps://doi.org/10.1109/iscas66217.2026.11562547openalex-snapshot
ViMA: A Decoupled FPGA Accelerator for Vision Mamba with Resource-Space Exploration
inferred← citeshttps://doi.org/10.1109/isqed60706.2024.10528738openalex-snapshot
AutoAnnotate: Reinforcement Learning based Code Annotation for High Level Synthesis
inferred← citeshttps://doi.org/10.1109/mwscas57524.2023.10405914openalex-snapshot
AutoHLS: Learning to Accelerate Design Space Exploration for HLS Designs
inferred← citeshttps://doi.org/10.1145/3626202.3637560openalex-snapshot
REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs
inferred← citeshttps://doi.org/10.1145/3653458openalex-snapshot
FADO: Floorplan-Aware Directive Optimization Based on Synthesis and Analytical Models for High-Level Synthesis Designs on Multi-Die FPGAs
inferred← citeshttps://doi.org/10.1145/3702005openalex-snapshot
CollectiveHLS: A Collaborative Approach to High-Level Synthesis Design Optimization
inferred← citeshttps://doi.org/10.1145/3764664openalex-snapshot
A Taxonomy of the High-Level Synthesis Ecosystem for Heterogeneous FPGA Systems
inferred← citeshttps://doi.org/10.1145/3797035openalex-snapshot
GNΩSIS: Lessons Learned in Generating a High-Level Synthesis Dataset
inferred← citeshttps://doi.org/10.23919/date69613.2026.11539136openalex-snapshot
A Collaborative Framework for Multi-Level Multi-Objective Design Space Exploration
inferred← citeshttps://doi.org/10.3390/s24072239openalex-snapshot
Flare: An FPGA-Based Full Precision Low Power CNN Accelerator with Reconfigurable Structure
inferred← citeshttps://doi.org/10.5753/jbcs.2025.4912openalex-snapshot
Efficient Number of Functional Units and Loop Pipeline Design Space Exploration for High-Level Synthesis
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