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NUMA-Aware DGEMM Based on 64-Bit ARMv8 Multicore Processors Architecture

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-642-01970-8_89openalex-snapshot
A Note on Auto-tuning GEMM for GPUs
inferredcites →https://doi.org/10.1007/978-3-642-19328-6_10openalex-snapshot
Accelerating GPU Kernels for Dense Linear Algebra
inferredcites →https://doi.org/10.1007/978-3-642-33065-0_18openalex-snapshot
High-Performance Matrix Multiply on a Massively Multithreaded Fiteng1000 Processor
inferredcites →https://doi.org/10.1109/ccgrid.2015.131openalex-snapshot
Analyzing MPI-3.0 Process-Level Shared Memory: A Case Study with Stencil Computations
inferredcites →https://doi.org/10.1109/cgo.2011.5764678openalex-snapshot
Automated programmable control and parameterization of compiler optimizations
inferredcites →https://doi.org/10.1109/icpads.2012.97openalex-snapshot
Model-driven Level 3 BLAS Performance Optimization on Loongson 3A Processor
inferredcites →https://doi.org/10.1109/icpp.2015.29openalex-snapshot
Design and Implementation of a Highly Efficient DGEMM for 64-Bit ARMv8 Multi-core Processors
inferredcites →https://doi.org/10.1109/ipdps.2011.33openalex-snapshot
Automatic Library Generation for BLAS3 on GPUs
inferredcites →https://doi.org/10.1109/ipdps.2014.110openalex-snapshot
Anatomy of High-Performance Many-Threaded Matrix Multiplication
inferredcites →https://doi.org/10.1109/ispa.2012.16openalex-snapshot
Reducing Energy Consumption of Dense Linear Algebra Operations on Hybrid CPU-GPU Platforms
inferredcites →https://doi.org/10.1109/ispass.2014.6844459openalex-snapshot
A Top-Down method for performance analysis and counters architecture
inferredcites →https://doi.org/10.1109/mm.2021.3085578openalex-snapshot
Kunpeng 920: The First 7-nm Chiplet-Based 64-Core ARM SoC for Cloud Services
inferredcites →https://doi.org/10.1109/sc.1998.10004openalex-snapshot
Automatically Tuned Linear Algebra Software
inferredcites →https://doi.org/10.1142/s0129626414500066openalex-snapshot
NUMA-Aware Multicore Matrix Multiplication
inferredcites →https://doi.org/10.1145/1356052.1356053openalex-snapshot
Anatomy of high-performance matrix multiplication
inferredcites →https://doi.org/10.1145/2503210.2503219openalex-snapshot
AUGEM
inferredcites →https://doi.org/10.1145/2764454openalex-snapshot
BLIS: A Framework for Rapidly Instantiating BLAS Functionality
inferredcites →https://doi.org/10.1145/292395.292412openalex-snapshot
GEMM-based level 3 BLAS
inferredcites →https://doi.org/10.1145/292395.292426openalex-snapshot
Algorithm 784: GEMM-based level 3 BLAS
inferredcites →https://doi.org/10.1145/3174243.3174258openalex-snapshot
A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform
inferredcites →https://doi.org/10.1145/3232162openalex-snapshot
Scale-Out vs Scale-Up
inferredcites →https://doi.org/10.3390/electronics7120359openalex-snapshot
Hybrid-Grained Dynamic Load Balanced GEMM on NUMA Architectures
inferredcites →https://doi.org/10.5555/2190025.2190057openalex-snapshot
Automated programmable control and parameterization of compiler optimizations
inferredcites →https://doi.org/10.5555/509058.509096openalex-snapshot
Automatically Tuned Linear Algebra Software

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/b978-0-443-45574-2.00022-8openalex-snapshot
Fundamentals of high-performance computing
inferred← citeshttps://doi.org/10.1016/j.jpdc.2023.01.004openalex-snapshot
Programming parallel dense matrix factorizations and inversion for new-generation NUMA architectures
inferred← citeshttps://doi.org/10.1016/j.parco.2023.103035openalex-snapshot
Optimizing massively parallel sparse matrix computing on ARM many-core processor
inferred← citeshttps://doi.org/10.1016/j.sysarc.2026.103902openalex-snapshot
RippleGEMM: Normalizing irregular DGEMM on CPUs via execution-layer optimization mechanisms
inferred← citeshttps://doi.org/10.1109/iscipt61983.2024.10672771openalex-snapshot
Debugging Method for Segmentation Faults Based on Hardware-Software Co-Analysis for Processor Verification
inferred← citeshttps://doi.org/10.1109/tpds.2023.3280805openalex-snapshot
Full-Stack Optimizing Transformer Inference on ARM Many-Core CPU
inferred← citeshttps://doi.org/10.1145/3545008.3545022openalex-snapshot
Characterizing and Optimizing Transformer Inference on ARM Many-core Processor
inferred← citeshttps://doi.org/10.25209/2079-3316-2022-13-1-131-194openalex-snapshot
Modern server ARM processors for supercomputers: A64FX and others. Initial data of benchmarks
inferred← citeshttps://doi.org/10.25209/2079-3316-2022-13-1-63-129openalex-snapshot
Modern server ARM processors for supercomputers: A64FX and others. Initial data of benchmarks
inferred← citeshttps://doi.org/10.3233/jcm-230005openalex-snapshot
Prevention and control tracking system based on 3D face recognition
inferred← citeshttps://doi.org/10.3390/computers15040223openalex-snapshot
AGP-GEMM: Adaptive Grouping and Partitioning Framework for Accelerating Small and Irregular Matrices on CPUs
inferred← citeshttps://doi.org/10.5121/csit.2022.1213openalex-snapshot
Computer Science and Information Technology
inferred← citeshttps://doi.org/10.5121/csit.2022.121313openalex-snapshot
Mass Surveillance, Behavioural Control, And Psychological Coercion the Moral Ethical Risks in Commercial Devices
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