On the public citation graph

The derivation of systolic implementations of programs

0 signed · 57 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-17943-7_127openalex-snapshot
An implemented method for incremental systolic design
inferredcites →https://doi.org/10.1007/978-3-642-68402-9_25openalex-snapshot
A Wavefront Notation Tool for VLSI Array Design
inferredcites →https://doi.org/10.1007/bf00265150openalex-snapshot
An incremental mechanical development of systolic solutions to the Algebraic Path Problem
inferredcites →https://doi.org/10.1007/bf01661171openalex-snapshot
Systolic algorithms as programs
inferredcites →https://doi.org/10.1007/bf02253318openalex-snapshot
A systolic array algorithm for the algebraic path problem (shortest paths; Matrix inversion)
inferredcites →https://doi.org/10.1007/bf02253685openalex-snapshot
Spacetime representations of computational structures
inferredcites →https://doi.org/10.1016/0167-6423(82)90003-xopenalex-snapshot
A methodology for programming with concurrency: the formalism
inferredcites →https://doi.org/10.1016/0167-6423(86)90005-5openalex-snapshot
A derivation of a distributed implementation of Warshall's algorithm
inferredcites →https://doi.org/10.1016/0743-7315(85)90029-2openalex-snapshot
Parallelism detection and transformation techniques useful for VLSI algorithms
inferredcites →https://doi.org/10.1109/5.4402openalex-snapshot
Regular iterative algorithms and their implementation on processor arrays
inferredcites →https://doi.org/10.1109/mc.1985.1662798openalex-snapshot
A Transformational Model of VLSI Systolic Design
inferredcites →https://doi.org/10.1109/proc.1983.12532openalex-snapshot
On the design of algorithms for VLSI systolic arrays
inferredcites →https://doi.org/10.1109/sfcs.1981.34openalex-snapshot
Optimizing synchronous systems
inferredcites →https://doi.org/10.1109/tc.1985.1676516openalex-snapshot
The Design of Optimal Systolic Arrays
inferredcites →https://doi.org/10.1109/tc.1986.1676652openalex-snapshot
Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
inferredcites →https://doi.org/10.1117/12.936899openalex-snapshot
Design Methodology For Systolic Arrays
inferredcites →https://doi.org/10.1145/323596.323597openalex-snapshot
Concurrent programming for the masses (invited address)
inferredcites →https://doi.org/10.1145/512644.512656openalex-snapshot
A parallel language and its compilation to multiprocessor machines or VLSI
inferredcites →https://doi.org/10.1145/512644.512673openalex-snapshot
A mechanically certified theorem about optimal concurrency of sorting networks

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/spe.4380200304openalex-snapshot
Code generation for a systolic computer
inferred← citeshttps://doi.org/10.1007/0-387-97226-9_25openalex-snapshot
A mechanically derived systolic implementation of pyramid initialization
inferred← citeshttps://doi.org/10.1007/3-540-17943-7_127openalex-snapshot
An implemented method for incremental systolic design
inferred← citeshttps://doi.org/10.1007/3-540-51285-3_45openalex-snapshot
Towards systolizing compilation: An overview
inferred← citeshttps://doi.org/10.1007/3-540-51305-1_18openalex-snapshot
The projection of systolic programs
inferred← citeshttps://doi.org/10.1007/3-540-55160-3_52openalex-snapshot
The synthesis of systolic programs
inferred← citeshttps://doi.org/10.1007/3-540-56883-2_17openalex-snapshot
A systolizing compilation scheme for nested loops with linear bounds
inferred← citeshttps://doi.org/10.1007/3-540-58430-7_16openalex-snapshot
Systematic approach and software tool for systolic design
inferred← citeshttps://doi.org/10.1007/3-540-61736-1_50openalex-snapshot
Data parallelism and functional programming
inferred← citeshttps://doi.org/10.1007/978-1-4612-4476-9_31openalex-snapshot
A Systolic Program for Gauss-Jordan Elimination
inferred← citeshttps://doi.org/10.1007/978-1-4615-3996-4_6openalex-snapshot
Affine Permutations of Matrices on Mesh-Connected Arrays
inferred← citeshttps://doi.org/10.1007/978-3-642-76119-5_56openalex-snapshot
Wie kann man imperative Programme auf eine Systolisierung vorbereiten?
inferred← citeshttps://doi.org/10.1007/bf00265150openalex-snapshot
An incremental mechanical development of systolic solutions to the Algebraic Path Problem
inferred← citeshttps://doi.org/10.1007/bf00925834openalex-snapshot
A systolic array for pyramidal algorithms
inferred← citeshttps://doi.org/10.1007/bf01558666openalex-snapshot
Synthesizing systolic arrays with control signals from recurrence equations
inferred← citeshttps://doi.org/10.1007/bf01888228openalex-snapshot
The projection of systolic programs
inferred← citeshttps://doi.org/10.1007/bf02311229openalex-snapshot
Towards systolizing compilation
inferred← citeshttps://doi.org/10.1007/bf02407035openalex-snapshot
Closed-form mapping conditions for the synthesis of linear processor arrays
inferred← citeshttps://doi.org/10.1016/0165-6074(90)90226-yopenalex-snapshot
The interactive space-time scheduler
inferred← citeshttps://doi.org/10.1016/0167-8191(90)90105-iopenalex-snapshot
Synthesizing systolic arrays from recurrence equations
inferred← citeshttps://doi.org/10.1016/0304-3975(90)90025-dopenalex-snapshot
On optimal parallelization of sorting networks
inferred← citeshttps://doi.org/10.1016/s0167-8191(05)80148-6openalex-snapshot
An FP-based tool for the synthesis of regular array algorithms
inferred← citeshttps://doi.org/10.1017/s0956796800001155openalex-snapshot
Total unfolding: theory and applications
inferred← citeshttps://doi.org/10.1080/00207219108921323openalex-snapshot
Classes of systolic arrays for digital filtering
inferred← citeshttps://doi.org/10.1080/02533839.1990.9677241openalex-snapshot
Synthesizing systolic algorithms by three‐level functional programs
inferred← citeshttps://doi.org/10.1109/71.80125openalex-snapshot
Mapping nested loop algorithms into multidimensional systolic arrays
inferred← citeshttps://doi.org/10.1109/icacte.2008.174openalex-snapshot
Presenting a Systematic Method for LU Decomposition of a Matrix with Linear Systolic Arrays
inferred← citeshttps://doi.org/10.1109/icapp.1996.562876openalex-snapshot
Systolic algorithms/architectures for division-free linear system solving
inferred← citeshttps://doi.org/10.1109/icpp.1994.86openalex-snapshot
Derivation of Systolic Programs
inferred← citeshttps://doi.org/10.1109/spdp.1990.143566openalex-snapshot
The formal derivation of distributed programs from systolic arrays
inferred← citeshttps://doi.org/10.1109/superc.1988.44682openalex-snapshot
A transformational approach to the derivation of hardware algorithms from recurrence equations
inferred← citeshttps://doi.org/10.1145/115865.115870openalex-snapshot
Detecting static algorithms by partial evaluation
inferred← citeshttps://doi.org/10.1145/327164.327221openalex-snapshot
A toroidal systolic array for Warshall's algorithm
inferred← citeshttps://doi.org/10.1145/509705.509706openalex-snapshot
Automatic data and computation decomposition on distributed memory parallel computers
inferred← citeshttps://doi.org/10.1145/76359.76365openalex-snapshot
On the design of some systolic algorithms
inferred← citeshttps://doi.org/10.1145/97444.97703openalex-snapshot
Preconditioning index set transformations for time-optimal affine scheduling
inferred← citeshttps://doi.org/10.11606/t.45.1991.tde-20220712-141710openalex-snapshot
Sintese de algoritmos paralelos para o n-cubo binario
inferred← citeshttps://doi.org/10.5555/62972.63027openalex-snapshot
A transformational approach to the derivation of hardware algorithms from recurrence equations
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.