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Verification using uninterpreted functions and finite instantiations

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-58179-0_44openalex-snapshot
Automatic verification of pipelined microprocessor control
inferredcites →https://doi.org/10.1007/3-540-58179-0_59openalex-snapshot
Ground temporal logic: A logic for hardware verification
inferredcites →https://doi.org/10.1007/3-540-60045-0_43openalex-snapshot
Automatic datapath abstraction in hardware systems
inferredcites →https://doi.org/10.1007/bf01383966openalex-snapshot
Formal verification by symbolic evaluation of partially-ordered trajectories
inferredcites →https://doi.org/10.1016/0378-4754(81)90068-9openalex-snapshot
Introduction to automata theory, languages and computation
inferredcites →https://doi.org/10.1016/s0022-0000(70)80022-8openalex-snapshot
On formalised computer programs
inferredcites →https://doi.org/10.1109/12.4607openalex-snapshot
Implementing precise interrupts in pipelined processors
inferredcites →https://doi.org/10.1109/4.475710openalex-snapshot
A 64-b microprocessor with multimedia support
inferredcites →https://doi.org/10.1109/aspdac.1995.486361openalex-snapshot
Applying formal verification to a commercial microprocessor
inferredcites →https://doi.org/10.1109/aspdac.1995.486363openalex-snapshot
Formal verification of pipelined and superscalar processors
inferredcites →https://doi.org/10.1145/1008861.1008863openalex-snapshot
Review of "Introduction to automata theory, languages and computation" by John E. Hopcroft and Jeffrey D. Ullman. Addison-Wesley 1979.
inferredcites →https://doi.org/10.1145/196244.196467openalex-snapshot
HSIS
inferredcites →https://doi.org/10.1145/196244.196577openalex-snapshot
Automatic verification of pipelined microprocessors
inferredcites →https://doi.org/10.1145/223982.224450openalex-snapshot
Architecture validation for processors
inferredcites →https://doi.org/10.1145/240518.240623openalex-snapshot
Techniques for verifying superscalar microprocessors
inferredcites →https://doi.org/10.1184/r1/6612938openalex-snapshot
Word Level Symbolic Model Checking A New Approach for Verifying Arithmetic Circuits

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/11814948_1openalex-snapshot
From Propositional Satisfiability to Satisfiability Modulo Theories
inferred← citeshttps://doi.org/10.1007/3-540-40922-x_28openalex-snapshot
Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs
inferred← citeshttps://doi.org/10.1007/3-540-44585-4_13openalex-snapshot
Finite Instantiations in Equivalence Logic with Uninterpreted Functions
inferred← citeshttps://doi.org/10.1007/3-540-44585-4_35openalex-snapshot
BOOSTER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstraction
inferred← citeshttps://doi.org/10.1007/3-540-48153-2_17openalex-snapshot
Verification of Infinite State Systems by Compositional Model Checking
inferred← citeshttps://doi.org/10.1007/3-540-48153-2_5openalex-snapshot
Superscalar Processor Verification Using Efficient Reductions of the Logic of Equality with Uninterpreted Functions to Propositional Logic
inferred← citeshttps://doi.org/10.1007/3-540-48683-6_39openalex-snapshot
Deciding Equality Formulas by Small Domains Instantiations
inferred← citeshttps://doi.org/10.1007/3-540-49519-3_23openalex-snapshot
Verification of Data-Insensitive Circuits: An In-Order-Retirement Case Study
inferred← citeshttps://doi.org/10.1007/3-540-49519-3_3openalex-snapshot
Bit-Level Abstraction in the Verification of Pipelined Microprocessors by Correspondence Checking
inferred← citeshttps://doi.org/10.1007/978-0-387-35190-2_3openalex-snapshot
Verifying Out-of-Order Executions
inferred← citeshttps://doi.org/10.1007/978-3-030-45237-7_10openalex-snapshot
What’s Decidable About Program Verification Modulo Axioms?
inferred← citeshttps://doi.org/10.1007/978-3-540-27815-3_11openalex-snapshot
Model-Checking Systems with Unbounded Variables without Abstraction
inferred← citeshttps://doi.org/10.1007/978-3-540-39724-3_31openalex-snapshot
Convergence Testing in Term-Level Bounded Model Checking
inferred← citeshttps://doi.org/10.1007/978-3-540-74105-3openalex-snapshot
Decision Procedures: An Algorithmic Point of View
inferred← citeshttps://doi.org/10.1007/978-3-540-85762-4_16openalex-snapshot
A New Approach for the Construction of Multiway Decision Graphs
inferred← citeshttps://doi.org/10.1007/978-3-540-88387-6_28openalex-snapshot
Approximate Invariant Property Checking Using Term-Height Reduction for a Subset of First-Order Logic
inferred← citeshttps://doi.org/10.1007/bfb0028749openalex-snapshot
BDD based procedures for a theory of equality with uninterpreted functions
inferred← citeshttps://doi.org/10.1007/bfb0028750openalex-snapshot
Computing reachable control states of systems modeled with uninterpreted functions and infinite memory
inferred← citeshttps://doi.org/10.1007/bfb0055616openalex-snapshot
Herbrand automata for hardware verification
inferred← citeshttps://doi.org/10.1016/s0167-6423(99)00030-1openalex-snapshot
A methodology for hardware verification using compositional model checking
inferred← citeshttps://doi.org/10.1023/a:1022988809947openalex-snapshot
BDD Based Procedures for a Theory of Equality with Uninterpreted Functions
inferred← citeshttps://doi.org/10.1109/iccad.2005.1560218openalex-snapshot
Scalable compositional minimization via static analysis
inferred← citeshttps://doi.org/10.1109/memcod.2003.1210091openalex-snapshot
Combining ACL2 and a /spl nu/-calculus model-checker to verify system-level designs
inferred← citeshttps://doi.org/10.1145/288548.289082openalex-snapshot
Formal verification of pipeline control using controlled token nets and abstract interpretation
inferred← citeshttps://doi.org/10.2197/ipsjtsldm.3.105openalex-snapshot
Approximate Invariant Property Checking Using Term-Height Reduction for a Subset of First-Order Logic
inferred← citeshttps://doi.org/10.2197/ipsjtsldm.3.268openalex-snapshot
Approximate Model Checking Using a Subset of First-order Logic
inferred← citeshttps://doi.org/10.5555/1129601.1129749openalex-snapshot
Scalable compositional minimization via static analysis
inferred← citeshttps://doi.org/10.5555/823453.823840openalex-snapshot
Combining ACL2 and a /spl nu/-calculus model-checker to verify system-level designs
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