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Fault Tolerant Deadlock-Free Adaptive Routing Algorithms for Hexagonal Networks-on-Chip
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1016/j.micpro.2015.06.002openalex-snapshot
Low cost fault-tolerant routing algorithm for Networks-on-Chip
inferredcites →https://doi.org/10.1093/ietisy/e89-d.5.1755openalex-snapshot
Routing in Hexagonal Networks under a Corner-Based Addressing Scheme
inferredcites →https://doi.org/10.1109/12.392844openalex-snapshot
Fault-tolerant wormhole routing algorithms for mesh networks
inferredcites →https://doi.org/10.1109/2.191995openalex-snapshot
A survey of wormhole routing techniques in direct networks
inferredcites →https://doi.org/10.1109/71.250114openalex-snapshot
A new theory of deadlock-free adaptive routing in wormhole networks
inferredcites →https://doi.org/10.1109/async.2011.15openalex-snapshot
Improving Dependability and Performance of Fully Asynchronous On-chip Networks
inferredcites →https://doi.org/10.1109/dac.2007.375263openalex-snapshot
Thousand Core ChipsA Technology Perspective
inferredcites →https://doi.org/10.1109/date.2009.5090627openalex-snapshot
A highly resilient routing algorithm for fault-tolerant NoCs
inferredcites →https://doi.org/10.1109/dft.2009.41openalex-snapshot
Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels
inferredcites →https://doi.org/10.1109/dsd.2008.14openalex-snapshot
A Network-on-Chip Channel Allocator for Run-Time Task Scheduling in Multi-Processor System-on-Chips
inferredcites →https://doi.org/10.1109/dsd.2012.82openalex-snapshot
MAFA: Adaptive Fault-Tolerant Routing Algorithm for Networks-on-Chip
inferredcites →https://doi.org/10.1109/ftcs.1993.627327openalex-snapshot
Fault-tolerant wormhole routing in meshes
inferredcites →https://doi.org/10.1109/hpec.2013.6670328openalex-snapshot
Adaptive routing in hexagonal torus interconnection networks
inferredcites →https://doi.org/10.1109/pdp.2013.75openalex-snapshot
High Performance Fault-Tolerant Routing Algorithm for NoC-Based Many-Core Systems
inferredcites →https://doi.org/10.1109/tc.2003.1228511openalex-snapshot
A fault-tolerant and deadlock-free routing protocol in 2D meshes based on odd-even turn model
inferredcites →https://doi.org/10.1145/1176254.1176289openalex-snapshot
A methodology for design of application specific deadlock-free routing algorithms for NoC systems
inferredcites →https://doi.org/10.1145/185675.185682openalex-snapshot
The turn model for adaptive routing
inferredcites →https://doi.org/10.1145/1921249.1921254openalex-snapshot
A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip
inferredcites →https://doi.org/10.1145/2522968.2522976openalex-snapshot
Methods for fault tolerance in networks-on-chip
inferredcites →https://doi.org/10.5555/1874620.1874628openalex-snapshot
A highly resilient routing algorithm for fault-tolerant NoCs
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1016/j.sysarc.2021.102026openalex-snapshot
Fault-Tolerant Application Mapping on Mesh-of-Tree based Network-on-Chip
inferred← citeshttps://doi.org/10.1109/acssc.2017.8335414openalex-snapshot
Scalable 5G MPSoC architecture
inferred← citeshttps://doi.org/10.1109/cybermatics_2018.2018.00312openalex-snapshot
Topological Response to Deadlock Detection and Resolution in Real-Time Database Systems
inferred← citeshttps://doi.org/10.1109/fdl.2019.8876904openalex-snapshot
A methodology to compute long-term fault resilience of NoCs under fault-tolerant routing algorithms
inferred← citeshttps://doi.org/10.1109/icctct.2018.8551009openalex-snapshot
A Review on Hybrid Network on Chip
inferred← citeshttps://doi.org/10.1109/jproc.2018.2874895openalex-snapshot
Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing
inferred← citeshttps://doi.org/10.1109/mcsoc60832.2023.00056openalex-snapshot
Systematic Construction of Deadlock-Free Routing for NoC Using Integer Linear Programming
inferred← citeshttps://doi.org/10.1109/rtas61025.2024.00024openalex-snapshot
Core-Local Reasoning and Predictable Cross-Core Communication with M3
inferred← citeshttps://doi.org/10.1109/vlsi-soc.2019.8920308openalex-snapshot
5G-and-Beyond Scalable Machines
inferred← citeshttps://doi.org/10.1145/3269983openalex-snapshot
Fault-Tolerant Network-on-Chip Design with Flexible Spare Core Placement
inferred← citeshttps://doi.org/10.23919/date.2017.7926959openalex-snapshot
Reliability assessment of fault tolerant routing algorithms in networks-on-chip: An analytic approach
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