On the public citation graph

Identifying Opportunities for Byte-Addressable Non-Volatile Memory in Extreme-Scale Scientific Applications

https://doi.org/10.1109/ipdps.2012.89

0 signed · 86 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.

Claim with ORCID

Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.

See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1088/0957-4484/21/11/115203openalex-snapshot

A low-temperature-grown TiO2-based device for the flexible stacked RRAM application

inferredcites →https://doi.org/10.1088/1742-6596/16/1/009openalex-snapshot

Direct numerical simulation of turbulent combustion: fundamental insights towards predictive models

inferredcites →https://doi.org/10.1109/clustr.2009.5289148openalex-snapshot

A performance evaluation of scientific I/O workloads on Flash-based SSDs

inferredcites →https://doi.org/10.1109/hpca.2011.5749738openalex-snapshot

Beyond block I/O: Rethinking traditional storage primitives

inferredcites →https://doi.org/10.1109/ispass.2007.363733openalex-snapshot

PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator

inferredcites →https://doi.org/10.1109/l-ca.2011.4openalex-snapshot

DRAMSim2: A Cycle Accurate Memory System Simulator

inferredcites →https://doi.org/10.1109/led.2010.2078794openalex-snapshot

A Phenomenological Model for the Reset Mechanism of Metal Oxide RRAM

inferredcites →https://doi.org/10.1109/pact.2009.30openalex-snapshot

Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures

inferredcites →https://doi.org/10.1109/sc.2005.59openalex-snapshot

Quantifying Locality In The Memory Access Patterns of HPC Applications

inferredcites →https://doi.org/10.1109/sc.2010.56openalex-snapshot

Understanding the Impact of Emerging Non-Volatile Memories on High-Performance, IO-Intensive Computing

inferredcites →https://doi.org/10.1109/tmag.2009.2024163openalex-snapshot

After Hard Drives—What Comes Next?

inferredcites →https://doi.org/10.1145/1064978.1065034openalex-snapshot

inferredcites →https://doi.org/10.1145/1065010.1065034openalex-snapshot

inferredcites →https://doi.org/10.1145/1555754.1555758openalex-snapshot

Architecting phase change memory as a scalable dram alternative

inferredcites →https://doi.org/10.1145/1555754.1555760openalex-snapshot

Scalable high performance main memory system using phase-change memory technology

inferredcites →https://doi.org/10.1145/1629575.1629589openalex-snapshot

Better I/O through byte-addressable, persistent memory

inferredcites →https://doi.org/10.1145/1950365.1950380openalex-snapshot

NV-Heaps

inferredcites →https://doi.org/10.1145/1995896.1995911openalex-snapshot

Page placement in hybrid memory systems

inferredcites →https://doi.org/10.1145/605397.605403openalex-snapshot

Automatically characterizing large scale program behavior

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/9781118711897.ch8openalex-snapshot

Scalable Storage I/O Software for Blue Gene Architectures

inferred← citeshttps://doi.org/10.1002/cpe.4031openalex-snapshot

DaC scan: a novel scan operator for exploiting SSD internal parallelism

inferred← citeshttps://doi.org/10.1007/978-3-319-13021-7_16openalex-snapshot

Exploring Opportunities for Non-volatile Memories in Big Data Applications

inferred← citeshttps://doi.org/10.1007/978-3-319-41321-1_25openalex-snapshot

Multi-versioning Performance Opportunities in BGAS System for Resilience

inferred← citeshttps://doi.org/10.1007/978-3-319-47099-3_3openalex-snapshot

Efficient Management for Hybrid Memory in Managed Language Runtime

inferred← citeshttps://doi.org/10.1007/978-3-319-58667-0_15openalex-snapshot

Extreme Event Analysis in Next Generation Simulation Architectures

inferred← citeshttps://doi.org/10.1007/978-3-642-34862-4_5openalex-snapshot

Energy Efficient Caching for Phase-Change Memory

inferred← citeshttps://doi.org/10.1007/s00450-014-0268-6openalex-snapshot

Exploring energy-performance-quality tradeoffs for scientific workflows with in-situ data analyses

inferred← citeshttps://doi.org/10.1007/s10586-017-1076-0openalex-snapshot

HALO: a fast and durable disk write cache using phase change memory

inferred← citeshttps://doi.org/10.1007/s11390-020-0942-zopenalex-snapshot

Unimem: Runtime Data Management on Non-Volatile Memory-Based Heterogeneous Main Memory for High Performance Computing

inferred← citeshttps://doi.org/10.1016/bs.adcom.2019.09.001openalex-snapshot

Introduction to non-volatile memory technologies

inferred← citeshttps://doi.org/10.1016/j.advengsoft.2016.07.003openalex-snapshot

Making the case for reforming the I/O software stack of extreme-scale systems

inferred← citeshttps://doi.org/10.1080/17517575.2017.1295321openalex-snapshot

Cost aware cache replacement policy in shared last-level cache for hybrid memory based fog computing

inferred← citeshttps://doi.org/10.1109/bigdatacongress.2017.18openalex-snapshot

SafeNVM: A Non-Volatile Memory Store with Thread-Level Page Protection

inferred← citeshttps://doi.org/10.1109/cahpc.2018.8645903openalex-snapshot

Phase-Based Data Placement Scheme for Heterogeneous Memory Systems

inferred← citeshttps://doi.org/10.1109/cluster.2014.6968745openalex-snapshot

Evaluation of emerging memory technologies for HPC, data intensive applications

inferred← citeshttps://doi.org/10.1109/cluster.2017.61openalex-snapshot

Algorithm-Directed Crash Consistence in Non-volatile Memory for HPC

inferred← citeshttps://doi.org/10.1109/cluster49012.2020.00034openalex-snapshot

Exploring Non-Volatility of Non-Volatile Memory for High Performance Computing Under Failures

inferred← citeshttps://doi.org/10.1109/dsn.2014.76openalex-snapshot

HeteroCheckpoint: Efficient Checkpointing for Accelerator-Based Systems

inferred← citeshttps://doi.org/10.1109/hipc.2013.6799122openalex-snapshot

Exploring energy and performance behaviors of data-intensive scientific workflows on systems with deep memory hierarchies

inferred← citeshttps://doi.org/10.1109/hipc.2016.023openalex-snapshot

Phoenix: Memory Speed HPC I/O with NVM

inferred← citeshttps://doi.org/10.1109/hpcc-smartcity-dss.2016.0074openalex-snapshot

Exploring Application Performance on Emerging Hybrid-Memory Supercomputers

inferred← citeshttps://doi.org/10.1109/iccd.2014.6974658openalex-snapshot

HAP: Hybrid-memory-Aware Partition in shared Last-Level Cache

inferred← citeshttps://doi.org/10.1109/ipdps.2013.69openalex-snapshot

Optimizing Checkpoints Using NVM as Virtual Memory

inferred← citeshttps://doi.org/10.1109/ipdps.2016.114openalex-snapshot

Write-Avoiding Algorithms

inferred← citeshttps://doi.org/10.1109/ipdps.2018.00041openalex-snapshot

Software-Hardware Managed Last-level Cache Allocation Scheme for Large-Scale NVRAM-Based Multicores Executing Parallel Data Analytics Applications

inferred← citeshttps://doi.org/10.1109/ipdps47924.2020.00098openalex-snapshot

Demystifying the Performance of HPC Scientific Applications on NVM-based Memory Systems

inferred← citeshttps://doi.org/10.1109/mcse.2015.4openalex-snapshot

Opportunities for Nonvolatile Memory Systems in Extreme-Scale High-Performance Computing

inferred← citeshttps://doi.org/10.1109/pact.2013.6618807openalex-snapshot

Exploring hybrid memory for GPU energy efficiency through software-hardware co-design

inferred← citeshttps://doi.org/10.1109/pact.2015.10openalex-snapshot

Exploiting Program Semantics to Place Data in Hybrid Memory

inferred← citeshttps://doi.org/10.1109/sbac-pad.2017.24openalex-snapshot

Object Placement for High Bandwidth Memory Augmented with High Capacity Memory

inferred← citeshttps://doi.org/10.1109/tc.2018.2868368openalex-snapshot

RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses

inferred← citeshttps://doi.org/10.1109/tpds.2015.2442980openalex-snapshot

A Survey of Software Techniques for Using Non-Volatile Memories for Storage and Main Memory Systems

inferred← citeshttps://doi.org/10.1109/works.2014.15openalex-snapshot

Sensitivity Analysis for Time Dependent Problems: Optimal Checkpoint-Recompute HPC Workflows

inferred← citeshttps://doi.org/10.1145/2742854.2742886openalex-snapshot

Software-managed energy-efficient hybrid DRAM/NVM main memory

inferred← citeshttps://doi.org/10.1145/2751205.2751212openalex-snapshot

Real-Time In-Memory Checkpointing for Future Hybrid Memory Systems

inferred← citeshttps://doi.org/10.1145/2771937.2771940openalex-snapshot

Energy-Efficient In-Memory Data Stores on Hybrid Memory Hierarchies

inferred← citeshttps://doi.org/10.1145/2846100openalex-snapshot

Efficient Memory-Mapped I/O on Fast Storage Device

inferred← citeshttps://doi.org/10.1145/2893186openalex-snapshot

Rethinking Computer Architectures and Software Systems for Phase-Change Memory

inferred← citeshttps://doi.org/10.1145/2926697.2926702openalex-snapshot

Characterizing emerging heterogeneous memory

inferred← citeshttps://doi.org/10.1145/2987550.2987570openalex-snapshot

RAMinate

inferred← citeshttps://doi.org/10.1145/2989081.2989082openalex-snapshot

Performance Impact of a Slower Main Memory

inferred← citeshttps://doi.org/10.1145/2989081.2989115openalex-snapshot

Exposing the Locality of Heterogeneous Memory Architectures to HPC Applications

inferred← citeshttps://doi.org/10.1145/3092255.3092273openalex-snapshot

RTHMS: a tool for data placement on hybrid memory system

inferred← citeshttps://doi.org/10.1145/3106340openalex-snapshot

HAP

inferred← citeshttps://doi.org/10.1145/3126908.3126923openalex-snapshot

Unimem

inferred← citeshttps://doi.org/10.1145/3126908.3126940openalex-snapshot

Transactional NVM cache with high performance and crash consistency

inferred← citeshttps://doi.org/10.1145/3131848openalex-snapshot

Emerging NVM

inferred← citeshttps://doi.org/10.1145/3156685.3092273openalex-snapshot

RTHMS: a tool for data placement on hybrid memory system

inferred← citeshttps://doi.org/10.1145/3205289.3205320openalex-snapshot

ProfDP

inferred← citeshttps://doi.org/10.1145/3241624.2926702openalex-snapshot

Characterizing emerging heterogeneous memory

inferred← citeshttps://doi.org/10.1145/3314221.3314650openalex-snapshot

Panthera: holistic memory management for big data processing over hybrid memories

inferred← citeshttps://doi.org/10.1145/3357526.3357563openalex-snapshot

Transitioning scientific applications to using non-volatile memory for resilience

inferred← citeshttps://doi.org/10.1145/3373376.3378472openalex-snapshot

MOD

inferred← citeshttps://doi.org/10.1145/3410463.3414651openalex-snapshot

Intelligent Data Placement on Discrete GPU Nodes with Unified Memory

inferred← citeshttps://doi.org/10.1145/3476838openalex-snapshot

Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation

inferred← citeshttps://doi.org/10.1145/3511211openalex-snapshot

Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories

inferred← citeshttps://doi.org/10.1177/1094342014568690openalex-snapshot

ExaSAT: An exascale co-design tool for performance modeling

inferred← citeshttps://doi.org/10.1186/s40537-023-00761-0openalex-snapshot

Main memory controller with multiple media technologies for big data workloads

inferred← citeshttps://doi.org/10.13140/rg.2.1.2013.4566openalex-snapshot

Efficient Storage Design and Query Scheduling for Improving Big Data Retrieval and Analytics

inferred← citeshttps://doi.org/10.15439/2016f52openalex-snapshot

A Parallel MPI I/O Solution Supported by Byte-addressable Non-volatile RAM Distributed Cache

inferred← citeshttps://doi.org/10.1631/fitee.1500352openalex-snapshot

Fine-grained checkpoint based on non-volatile memory

inferred← citeshttps://doi.org/10.48550/arxiv.1705.00249openalex-snapshot

Unimem: Runtime Data Management on Non-Volatile Memory-based Heterogeneous Main Memory

inferred← citeshttps://doi.org/10.48550/arxiv.1906.10081openalex-snapshot

EasyCrash: Exploring Non-Volatility of Non-Volatile Memory for High Performance Computing Under Failures

inferred← citeshttps://doi.org/10.48550/arxiv.1908.11850openalex-snapshot

MOD: Minimally Ordered Durable Datastructures for Persistent Memory

inferred← citeshttps://doi.org/10.5555/2523721.2523737openalex-snapshot

Exploring hybrid memory for GPU energy efficiency through software-hardware co-design

inferred← citeshttps://doi.org/10.5821/dissertation-2117-167837openalex-snapshot

Evaluation of STT-MRAM main memory for HPC and real-time systems

Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.