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Rethinking Computer Architectures and Software Systems for Phase-Change Memory
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1016/j.sysarc.2014.07.002openalex-snapshot
A space allocation and reuse strategy for PCM-based embedded systems
inferredcites →https://doi.org/10.1109/3dic.2009.5306582openalex-snapshot
Architectural evaluation of 3D stacked RRAM caches
inferredcites →https://doi.org/10.1109/aspdac.2013.6509609openalex-snapshot
Curling-PCM: Application-specific wear leveling for phase change memory based embedded systems
inferredcites →https://doi.org/10.1109/aspdac.2015.7059056openalex-snapshot
Minimizing MLC PCM write energy for free through profiling-based state remapping
inferredcites →https://doi.org/10.1109/ats.2012.57openalex-snapshot
SoftPCM: Enhancing Energy Efficiency and Lifetime of Phase Change Memory in Video Applications via Approximate Write
inferredcites →https://doi.org/10.1109/date.2010.5457221openalex-snapshot
Energy- and endurance-aware design of phase change memory caches
inferredcites →https://doi.org/10.1109/dsn.2014.33openalex-snapshot
WL-Reviver: A Framework for Reviving any Wear-Leveling Techniques in the Face of Failures on Phase Change Memory
inferredcites →https://doi.org/10.1109/edssc.2009.5394196openalex-snapshot
Design optimization in write speed of multi-level cell application for phase change memory
inferredcites →https://doi.org/10.1109/hpca.2010.5416645openalex-snapshot
Improving read performance of Phase Change Memories via Write Cancellation and Write Pausing
inferredcites →https://doi.org/10.1109/hpca.2011.5749752openalex-snapshot
FREE-p: Protecting non-volatile memory against both hard and soft errors
inferredcites →https://doi.org/10.1109/hpca.2011.5749753openalex-snapshot
Practical and secure PCM systems by online detection of malicious write streams
inferredcites →https://doi.org/10.1109/hpca.2013.6522321openalex-snapshot
Coset coding to extend the lifetime of memory
inferredcites →https://doi.org/10.1109/hpca.2014.6835960openalex-snapshot
Reducing the cost of persistence for nonvolatile heaps in end user devices
inferredcites →https://doi.org/10.1109/hpca32246.2014openalex-snapshot
2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)
inferredcites →https://doi.org/10.1109/iccd.2011.6081394openalex-snapshot
Energy-efficient multi-level cell phase-change memory system with data encoding
inferredcites →https://doi.org/10.1109/iccd.2012.6378661openalex-snapshot
Row buffer locality aware caching policies for hybrid memories
inferredcites →https://doi.org/10.1109/iccd.2014.6974656openalex-snapshot
Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory
inferredcites →https://doi.org/10.1109/icis.2012.30openalex-snapshot
An Effective Hierarchical PRAM-SLC-MLC Hybrid Solid State Disk
inferredcites →https://doi.org/10.1109/iedm.2009.5424263openalex-snapshot
A stackable cross point Phase Change Memory
inferredcites →https://doi.org/10.1109/ipdps.2012.89openalex-snapshot
Identifying Opportunities for Byte-Addressable Non-Volatile Memory in Extreme-Scale Scientific Applications
inferredcites →https://doi.org/10.1109/iscas.2007.377981openalex-snapshot
A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme
inferredcites →https://doi.org/10.1109/ispass.2011.5762715openalex-snapshot
Analyzing the impact of useless write-backs on the endurance and energy consumption of PCM main memory
inferredcites →https://doi.org/10.1109/l-ca.2010.2openalex-snapshot
A Phase Change Memory as a Secure Main Memory
inferredcites →https://doi.org/10.1109/mc.2003.1250880openalex-snapshot
Energy management for commercial servers
inferredcites →https://doi.org/10.1109/mc.2011.18openalex-snapshot
From Microprocessors to Nanostores: Rethinking Data-Centric Systems
inferredcites →https://doi.org/10.1109/micro.2010.46openalex-snapshot
SAFER: Stuck-At-Fault Error Recovery for Memories
inferredcites →https://doi.org/10.1109/mm.2010.24openalex-snapshot
Phase-Change Technology and the Future of Main Memory
inferredcites →https://doi.org/10.1109/nas.2012.37openalex-snapshot
Wear-Resistant Hybrid Cache Architecture with Phase Change Memory
inferredcites →https://doi.org/10.1109/tkde.2013.35openalex-snapshot
On-Demand Snapshot: An Efficient Versioning File System for Phase-Change Memory
inferredcites →https://doi.org/10.1109/tmag.2009.2024163openalex-snapshot
After Hard Drives—What Comes Next?
inferredcites →https://doi.org/10.1109/tpds.2014.2324563openalex-snapshot
A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-Volatile On-Chip Caches
inferredcites →https://doi.org/10.1109/tpds.2015.2435788openalex-snapshot
A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems
inferredcites →https://doi.org/10.1145/1391469.1391610openalex-snapshot
Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement
inferredcites →https://doi.org/10.1145/1555754.1555758openalex-snapshot
Architecting phase change memory as a scalable dram alternative
inferredcites →https://doi.org/10.1145/1555754.1555759openalex-snapshot
A durable and energy efficient main memory using phase change memory technology
inferredcites →https://doi.org/10.1145/1555754.1555760openalex-snapshot
Scalable high performance main memory system using phase-change memory technology
inferredcites →https://doi.org/10.1145/1555754.1555761openalex-snapshot
Hybrid cache architecture with disparate memory technologies
inferredcites →https://doi.org/10.1145/1629575.1629589openalex-snapshot
Better I/O through byte-addressable, persistent memory
inferredcites →https://doi.org/10.1145/1654059.1654117openalex-snapshot
Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems
inferredcites →https://doi.org/10.1145/1669112.1669117openalex-snapshot
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
inferredcites →https://doi.org/10.1145/1815961.1815980openalex-snapshot
Use ECP, not ECC, for hard failures in resistive memories
inferredcites →https://doi.org/10.1145/1970386.1970387openalex-snapshot
Hybrid checkpointing using emerging nonvolatile memories for future exascale systems
inferredcites →https://doi.org/10.1145/1995896.1995911openalex-snapshot
Page placement in hybrid memory systems
inferredcites →https://doi.org/10.1145/2094091.2094104openalex-snapshot
Energy-aware writes to non-volatile main memory
inferredcites →https://doi.org/10.1145/2206781.2206865openalex-snapshot
A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures
inferredcites →https://doi.org/10.1145/2400682.2400714openalex-snapshot
Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory
inferredcites →https://doi.org/10.1145/2442116.2442131openalex-snapshot
Energy-efficient and high-performance software architecture for storage class memory
inferredcites →https://doi.org/10.1145/2459316.2459318openalex-snapshot
Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory
inferredcites →https://doi.org/10.1145/2480362.2480660openalex-snapshot
Integrating memory management with a file system on a non-volatile main memory system
inferredcites →https://doi.org/10.1145/2485922.2485960openalex-snapshot
Tri-level-cell phase change memory
inferredcites →https://doi.org/10.1145/2485922.2485961openalex-snapshot
Zombie memory: Extending memory lifetime by reviving dead blocks
inferredcites →https://doi.org/10.1145/2524211.2524216openalex-snapshot
Consistent, durable, and safe memory management for byte-addressable non volatile main memory
inferredcites →https://doi.org/10.1145/2592798.2592814openalex-snapshot
System software for persistent memory
inferredcites →https://doi.org/10.1145/2593069.2593217openalex-snapshot
SLC-enabled Wear Leveling for MLC PCM Considering Process Variation
inferredcites →https://doi.org/10.1145/2656045.2656049openalex-snapshot
Building high-performance smartphones via non-volatile memory
inferredcites →https://doi.org/10.1145/2668930.2695529openalex-snapshot
A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics
inferredcites →https://doi.org/10.1145/2697394openalex-snapshot
Towards Write-Activity-Aware Page Table Management for Non-volatile Main Memories
inferredcites →https://doi.org/10.1147/rd.524.0449openalex-snapshot
Overview of candidate device technologies for storage-class memory
inferredcites →https://doi.org/10.1147/rd.524.0465openalex-snapshot
Phase-change random access memory: A scalable technology
inferredcites →https://doi.org/10.1184/r1/6469397openalex-snapshot
Techniques for Data Mapping and Buffering to Exploit Asymmetry in Multi-Level Cell (Phase Change) Memory
inferredcites →https://doi.org/10.14778/2732228.2732231openalex-snapshot
Storage management in the NVRAM era
inferredcites →https://doi.org/10.1557/mrs.2014.139openalex-snapshot
Phase change materials and phase change memory
inferredcites →https://doi.org/10.5555/1298455.1298459openalex-snapshot
Stasis: flexible transactional storage
inferredcites →https://doi.org/10.5555/1874620.1874803openalex-snapshot
Power and performance of read-write aware hybrid caches with non-volatile memories
inferredcites →https://doi.org/10.5555/1950815.1950867openalex-snapshot
A frequent-value based PRAM memory architecture
inferredcites →https://doi.org/10.5555/1960475.1960480openalex-snapshot
Consistent and durable data structures for non-volatile byte-addressable memory
inferredcites →https://doi.org/10.5555/2591272.2591280openalex-snapshot
Unioning of the buffer cache and journaling layers with non-volatile memory
inferredcites →https://doi.org/10.5555/2750482.2750495openalex-snapshot
NV-Tree: reducing consistency cost for NVM-based single level systems
inferredcites →https://doi.org/10.5555/2755753.2757117openalex-snapshot
nCode: limiting harmful writes to emerging mobile NVRAM through code swapping
inferredcites →https://doi.org/10.7567/jjaps.26s4.61openalex-snapshot
High Speed Overwritable Phase Change Optical Disk Material
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s11390-020-0780-zopenalex-snapshot
A Survey of Non-Volatile Main Memory Technologies: State-of-the-Arts, Practices, and Future Directions
inferred← citeshttps://doi.org/10.1007/s11390-023-1054-3openalex-snapshot
A Survey of Non-Volatile Main Memory File Systems
inferred← citeshttps://doi.org/10.1007/s11704-020-9395-3openalex-snapshot
A survey of operating system support for persistent memory
inferred← citeshttps://doi.org/10.1007/s11704-020-9448-7openalex-snapshot
Resource abstraction and data placement for distributed hybrid memory pool
inferred← citeshttps://doi.org/10.1016/j.future.2018.02.038openalex-snapshot
DWARM: A wear-aware memory management scheme for in-memory file systems
inferred← citeshttps://doi.org/10.1109/access.2018.2875820openalex-snapshot
Wear Leveling for Non-Volatile Memory: a Runtime System Approach
inferred← citeshttps://doi.org/10.1109/access.2019.2899463openalex-snapshot
Non-Volatile Memory File Systems: A Survey
inferred← citeshttps://doi.org/10.1109/access.2025.3531338openalex-snapshot
DaLAMED: A Clock-Frequency and Data-Lifetime-Aware Methodology for Energy-Efficient Memory Design in Edge Devices
inferred← citeshttps://doi.org/10.1109/jsyst.2020.2975673openalex-snapshot
Multigranularity Space Management Scheme for Accelerating the Write Performance of In-Memory File Systems
inferred← citeshttps://doi.org/10.1109/msst.2019.000-7openalex-snapshot
Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM Slots
inferred← citeshttps://doi.org/10.1145/3731454openalex-snapshot
NVM in Data Storage: A Post-Optane Future
inferred← citeshttps://doi.org/10.1145/3777464openalex-snapshot
A Transparent NVM Acceleration Framework for Disk File Systems
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