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Scalar Waving: Improving the Efficiency of SIMD Execution on GPUs

https://doi.org/10.1109/ipdps.2014.22

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-642-14122-5_8openalex-snapshot

Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations

inferredcites →https://doi.org/10.1016/0167-8191(88)90094-4openalex-snapshot

A single-program-multiple-data computational model for EPEX/FORTRAN

inferredcites →https://doi.org/10.1109/cgo.2013.6494995openalex-snapshot

Convergence and scalarization for data-parallel architectures

inferredcites →https://doi.org/10.1109/hpca.2011.5749714openalex-snapshot

Thread block compaction for efficient SIMT control flow

inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot

Rodinia: A benchmark suite for heterogeneous computing

inferredcites →https://doi.org/10.1109/isca.2012.6237005openalex-snapshot

Simultaneous branch and warp interweaving for sustained GPU performance

inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot

Analyzing CUDA workloads using a detailed GPU simulator

inferredcites →https://doi.org/10.1109/ispass.2013.6557173openalex-snapshot

Characterizing scalar opportunities in GPGPU applications

inferredcites →https://doi.org/10.1109/micro.2007.12openalex-snapshot

Microarchitectural Design Space Exploration Using an Architecture-Centric Approach

inferredcites →https://doi.org/10.1109/micro.2007.30openalex-snapshot

Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow

inferredcites →https://doi.org/10.1109/pact.2011.63openalex-snapshot

Divergence Analysis and Optimizations

inferredcites →https://doi.org/10.1145/2019608.2019612openalex-snapshot

Power gating strategies on GPUs

inferredcites →https://doi.org/10.1145/207110.207115openalex-snapshot

Efficient building and placing of gating functions

inferredcites →https://doi.org/10.1145/2155620.2155656openalex-snapshot

Improving GPU performance via large warps and two-level warp scheduling

inferredcites →https://doi.org/10.1145/2366231.2337166openalex-snapshot

Simultaneous branch and warp interweaving for sustained GPU performance

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/j.jpdc.2018.11.012openalex-snapshot

A survey of architectural approaches for improving GPGPU performance, programmability and heterogeneity

inferred← citeshttps://doi.org/10.1016/j.jpdc.2020.10.005openalex-snapshot

Graph-Waving architecture: Efficient execution of graph applications on GPUs

inferred← citeshttps://doi.org/10.1109/hpca.2017.51openalex-snapshot

G-Scalar: Cost-Effective Generalized Scalar Execution Architecture for Power-Efficient GPUs

inferred← citeshttps://doi.org/10.1109/iccd63220.2024.00047openalex-snapshot

Advanced Dynamic Scalarisation for RISC-V GPGPUs

inferred← citeshttps://doi.org/10.1109/icppw.2016.23openalex-snapshot

Energy Efficient Affine Register File for GPU Microarchitecture

inferred← citeshttps://doi.org/10.1109/ipdps.2016.74openalex-snapshot

Balancing Scalar and Vector Execution on GPU Architectures

inferred← citeshttps://doi.org/10.1109/ispass.2018.00035openalex-snapshot

A Cross-platform Evaluation of Graphics Shader Compiler Optimization

inferred← citeshttps://doi.org/10.1109/micro50266.2020.00065openalex-snapshot

Duplo: Lifting Redundant Memory Accesses of Deep Neural Networks for GPU Tensor Cores

inferred← citeshttps://doi.org/10.1145/2751205.2751234openalex-snapshot

A Stall-Aware Warp Scheduling for Dynamically Optimizing Thread-level Parallelism in GPGPUs

inferred← citeshttps://doi.org/10.1145/3133218openalex-snapshot

Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files

inferred← citeshttps://doi.org/10.1145/3218603.3218626openalex-snapshot

Load-Triggered Warp Approximation on GPU

inferred← citeshttps://doi.org/10.1145/3712285.3759830openalex-snapshot

RedSan: A Redundant Memory Instruction Sanitizer for GPU Programs

inferred← citeshttps://doi.org/10.1145/3760250.3762234openalex-snapshot

CHERI-SIMT: Implementing Capability Memory Protection in GPUs

inferred← citeshttps://doi.org/10.17760/d20213163openalex-snapshot

Cross-platform heterogeneous runtime environment

inferred← citeshttps://doi.org/10.17760/d20251481openalex-snapshot

Scalar-vector GPU architectures

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