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Divergence Analysis and Optimizations
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-642-14122-5_8openalex-snapshot
Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations
inferredcites →https://doi.org/10.1007/978-3-662-25209-3_7openalex-snapshot
POMP or How to design a massively parallel machine with small developments
inferredcites →https://doi.org/10.1016/0022-2836(81)90087-5openalex-snapshot
Identification of common molecular subsequences
inferredcites →https://doi.org/10.1016/0167-739x(92)90069-nopenalex-snapshot
Control structures for data-parallel SIMD languages: semantics and implementation
inferredcites →https://doi.org/10.1016/s0304-3975(96)00113-2openalex-snapshot
Formal specification of parallel SIMD execution
inferredcites →https://doi.org/10.1017/cbo9780511811432openalex-snapshot
Modern Compiler Implementation in Java
inferredcites →https://doi.org/10.1093/bib/5.4.393-aopenalex-snapshot
Bioinformatics: Sequence and Genome Analysis
inferredcites →https://doi.org/10.1109/cgo.2004.1281665openalex-snapshot
LLVM: a compilation framework for lifelong program analysis & transformation
inferredcites →https://doi.org/10.1109/fmpc.1990.89498openalex-snapshot
Vcode: a data-parallel intermediate language
inferredcites →https://doi.org/10.1109/hicss.1997.667215openalex-snapshot
Efficient oblivious parallel sorting on the MasPar MP-1
inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot
Rodinia: A benchmark suite for heterogeneous computing
inferredcites →https://doi.org/10.1109/iiswc.2009.5306801openalex-snapshot
A characterization and analysis of PTX kernels
inferredcites →https://doi.org/10.1109/ipdps.2008.4536251openalex-snapshot
Massive supercomputing coping with heterogeneity of modern accelerators
inferredcites →https://doi.org/10.1109/micro.2007.12openalex-snapshot
Microarchitectural Design Space Exploration Using an Architecture-Centric Approach
inferredcites →https://doi.org/10.1109/micro.2007.30openalex-snapshot
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow
inferredcites →https://doi.org/10.1109/pact.2007.41openalex-snapshot
Introducing Control Flow into Vectorized Code
inferredcites →https://doi.org/10.1109/pact.2007.4336219openalex-snapshot
Introducing Control Flow into Vectorized Code
inferredcites →https://doi.org/10.1109/sbac-pad.2010.38openalex-snapshot
Performance Debugging of GPGPU Applications with the Divergence Map
inferredcites →https://doi.org/10.1109/scam.2008.22openalex-snapshot
User-Input Dependence Analysis via Graph Reachability
inferredcites →https://doi.org/10.1109/tc.1972.5009071openalex-snapshot
Some Computer Organizations and Their Effectiveness
inferredcites →https://doi.org/10.1109/tc.1982.1675922openalex-snapshot
Wavefront Array Processor: Language, Architecture, and Applications
inferredcites →https://doi.org/10.1145/115372.115320openalex-snapshot
Efficiently computing static single assignment form and the control dependence graph
inferredcites →https://doi.org/10.1145/1330511.1330512openalex-snapshot
Synthesis and evaluation of linear motion transitions
inferredcites →https://doi.org/10.1145/1693453.1693470openalex-snapshot
An adaptive performance modeling tool for GPU architectures
inferredcites →https://doi.org/10.1145/1772954.1772971openalex-snapshot
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
inferredcites →https://doi.org/10.1145/1810085.1810104openalex-snapshot
Streamlining GPU applications on the fly
inferredcites →https://doi.org/10.1145/1839676.1839694openalex-snapshot
Understanding throughput-oriented architectures
inferredcites →https://doi.org/10.1145/1950365.1950408openalex-snapshot
On-the-fly elimination of dynamic irregularities for GPU computing
inferredcites →https://doi.org/10.1145/24039.24041openalex-snapshot
The program dependence graph and its use in optimization
inferredcites →https://doi.org/10.1145/357073.357075openalex-snapshot
A Language for Array and Vector Processors
inferredcites →https://doi.org/10.1145/359060.359069openalex-snapshot
Global optimization by suppression of partial redundancies
inferredcites →https://doi.org/10.1145/360680.360687openalex-snapshot
Glypnir—a programming language for Illiac IV
inferredcites →https://doi.org/10.1145/93542.93578openalex-snapshot
The program dependence web: a representation supporting control-, data-, and demand-driven interpretation of imperative languages
inferredcites →https://doi.org/10.2168/lmcs-7(1:10)2011openalex-snapshot
Equality Saturation: A New Approach to Optimization
inferredcites →https://doi.org/10.5555/110382.110458openalex-snapshot
Loop distribution with arbitrary control flow
inferredcites →https://doi.org/10.5860/choice.39-0923openalex-snapshot
Bioinformatics: sequence and genome analysis
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.2853openalex-snapshot
Profiling divergences in GPU applications
inferred← citeshttps://doi.org/10.1002/esp.70326openalex-snapshot
Texture–terrain integration for classification of karst Fenglin–Fengcong landforms in Southwest China
inferred← citeshttps://doi.org/10.1007/978-3-030-69984-0_46openalex-snapshot
Contrived and Remediated GPU Thread Divergence Using a Flattening Technique
inferred← citeshttps://doi.org/10.1007/978-3-030-72789-5_5openalex-snapshot
Common Subexpression Convergence: A New Code Optimization for SIMT Processors
inferred← citeshttps://doi.org/10.1007/978-3-031-85638-9_7openalex-snapshot
Is Manual Code Optimization Still Required to Mitigate GPU Thread Divergence? Applying a Flattening Technique to Observe Performance
inferred← citeshttps://doi.org/10.1007/978-3-319-17473-0_3openalex-snapshot
GLES: A Practical GPGPU Optimizing Compiler Using Data Sharing and Thread Coarsening
inferred← citeshttps://doi.org/10.1007/978-3-642-33182-4_3openalex-snapshot
Spill Code Placement for SIMD Machines
inferred← citeshttps://doi.org/10.1007/978-3-642-40885-4_5openalex-snapshot
Presburger Arithmetic in Memory Access Optimization for Data-Parallel Languages
inferred← citeshttps://doi.org/10.1007/978-3-642-54807-9_8openalex-snapshot
Taming Control Divergence in GPUs through Control Flow Linearization
inferred← citeshttps://doi.org/10.1007/s11227-022-04359-wopenalex-snapshot
Vectorizing divergent control flow with active-lane consolidation on long-vector architectures
inferred← citeshttps://doi.org/10.1007/s11227-023-05375-0openalex-snapshot
Reducing branch divergence to speed up parallel execution of unit testing on GPUs
inferred← citeshttps://doi.org/10.1016/j.cma.2020.113188openalex-snapshot
GMRES with embedded ensemble propagation for the efficient solution of parametric linear systems in uncertainty quantification of computational models
inferred← citeshttps://doi.org/10.1016/j.jpdc.2020.02.003openalex-snapshot
On-GPU thread-data remapping for nested branch divergence
inferred← citeshttps://doi.org/10.1016/j.jpdc.2020.10.005openalex-snapshot
Graph-Waving architecture: Efficient execution of graph applications on GPUs
inferred← citeshttps://doi.org/10.1109/cgo.2013.6494995openalex-snapshot
Convergence and scalarization for data-parallel architectures
inferred← citeshttps://doi.org/10.1109/cgo.2015.7054205openalex-snapshot
Locality-centric thread scheduling for bulk-synchronous programming models on CPU architectures
inferred← citeshttps://doi.org/10.1109/cgo.2017.7863727openalex-snapshot
TwinKernels: An execution model to improve GPU hardware scheduling at compile time
inferred← citeshttps://doi.org/10.1109/cgo.2019.8661174openalex-snapshot
Function Merging by Sequence Alignment
inferred← citeshttps://doi.org/10.1109/cgo.2019.8661189openalex-snapshot
IGC: The Open Source Intel Graphics Compiler
inferred← citeshttps://doi.org/10.1109/cgo51591.2021.9370324openalex-snapshot
C-for-Metal: High Performance Simd Programming on Intel GPUs
inferred← citeshttps://doi.org/10.1109/cgo57630.2024.10444819openalex-snapshot
Enhancing Performance Through Control-Flow Unmerging and Loop Unrolling on GPUs
inferred← citeshttps://doi.org/10.1109/coolchips61292.2024.10531165openalex-snapshot
Branch Divergence-Aware Flexible Approximating Technique on GPUs
inferred← citeshttps://doi.org/10.1109/csci46756.2018.00270openalex-snapshot
Unraveling the Divergence of GPU Threads
inferred← citeshttps://doi.org/10.1109/dasc.2013.120openalex-snapshot
Convergence and Scalarization in Whole Function Vectorization
inferred← citeshttps://doi.org/10.1109/grc.2012.6469271openalex-snapshot
Variable optimization in code migration from GPU to multi-core
inferred← citeshttps://doi.org/10.1109/hpca.2017.51openalex-snapshot
G-Scalar: Cost-Effective Generalized Scalar Execution Architecture for Power-Efficient GPUs
inferred← citeshttps://doi.org/10.1109/hpcsim.2016.7568315openalex-snapshot
Efficient control flow restructuring for GPUs
inferred← citeshttps://doi.org/10.1109/hpec.2015.7322477openalex-snapshot
Algorithm Flattening: Complete branch elimination for GPU requires a paradigm shift from CPU thinking
inferred← citeshttps://doi.org/10.1109/iccd56317.2022.00080openalex-snapshot
LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning
inferred← citeshttps://doi.org/10.1109/icppw.2012.74openalex-snapshot
Enabling an OpenCL Compiler for Embedded Multicore DSP Systems
inferred← citeshttps://doi.org/10.1109/ipdps.2014.22openalex-snapshot
Scalar Waving: Improving the Efficiency of SIMD Execution on GPUs
inferred← citeshttps://doi.org/10.1109/ipdps.2016.74openalex-snapshot
Balancing Scalar and Vector Execution on GPU Architectures
inferred← citeshttps://doi.org/10.1109/ispass.2013.6557173openalex-snapshot
Characterizing scalar opportunities in GPGPU applications
inferred← citeshttps://doi.org/10.1109/llvm-hpc.2018.8639483openalex-snapshot
Function/Kernel Vectorization via Loop Vectorizer
inferred← citeshttps://doi.org/10.1109/micro.2014.48openalex-snapshot
Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures
inferred← citeshttps://doi.org/10.1109/mm.2024.3504261openalex-snapshot
Flexible Approximate Computing for Mitigating Branch Divergence in GPUs
inferred← citeshttps://doi.org/10.1109/padsw.2014.7097874openalex-snapshot
Fast GPU parallel N-Body tree traversal with Simulated Wide-Warp
inferred← citeshttps://doi.org/10.1109/sbac-pad.2012.22openalex-snapshot
Divergence Analysis with Affine Constraints
inferred← citeshttps://doi.org/10.1109/tcad.2021.3104529openalex-snapshot
Eff-ECC: Protecting GPGPUs Register File With a Unified Energy-Efficient ECC Mechanism
inferred← citeshttps://doi.org/10.1145/2259016.2259020openalex-snapshot
Dynamic compilation of data-parallel kernels for vector processors
inferred← citeshttps://doi.org/10.1145/2464996.2465022openalex-snapshot
Exploiting uniform vector instructions for GPGPU performance, energy efficiency, and opportunistic reliability enhancement
inferred← citeshttps://doi.org/10.1145/2485922.2485934openalex-snapshot
Microarchitectural mechanisms to exploit value structure in SIMT architectures
inferred← citeshttps://doi.org/10.1145/2503210.2503268openalex-snapshot
A large-scale cross-architecture evaluation of thread-coarsening
inferred← citeshttps://doi.org/10.1145/2508148.2485934openalex-snapshot
Microarchitectural mechanisms to exploit value structure in SIMT architectures
inferred← citeshttps://doi.org/10.1145/2579617openalex-snapshot
Leveraging GPUs using cooperative loop speculation
inferred← citeshttps://doi.org/10.1145/2628071.2628087openalex-snapshot
Automatic optimization of thread-coarsening for graphics processors
inferred← citeshttps://doi.org/10.1145/2628071.2628101openalex-snapshot
Warp-aware trace scheduling for GPUs
inferred← citeshttps://doi.org/10.1145/2687355openalex-snapshot
The Impact of the SIMD Width on Control-Flow and Memory Divergence
inferred← citeshttps://doi.org/10.1145/2723742.2723760openalex-snapshot
A Profile Guided Approach to Optimize Branch Divergence While Transforming Applications for GPUs
inferred← citeshttps://doi.org/10.1145/2811402openalex-snapshot
Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency
inferred← citeshttps://doi.org/10.1145/2830772.2830796openalex-snapshot
Efficient warp execution in presence of divergence with collaborative context collection
inferred← citeshttps://doi.org/10.1145/2856636.2856639openalex-snapshot
Divergence Aware Automated Partitioning of OpenCL Workloads
inferred← citeshttps://doi.org/10.1145/2892208.2892217openalex-snapshot
Input space splitting for OpenCL
inferred← citeshttps://doi.org/10.1145/3018743.3018751openalex-snapshot
Function Call Re-Vectorization
inferred← citeshttps://doi.org/10.1145/3155284.3018751openalex-snapshot
Function Call Re-Vectorization
inferred← citeshttps://doi.org/10.1145/3178433.3178440openalex-snapshot
A Data Layout Transformation for Vectorizing Compilers
inferred← citeshttps://doi.org/10.1145/3192366.3192413openalex-snapshot
Partial control-flow linearization
inferred← citeshttps://doi.org/10.1145/3242089openalex-snapshot
On-GPU Thread-Data Remapping for Branch Divergence Reduction
inferred← citeshttps://doi.org/10.1145/3296979.3192413openalex-snapshot
Partial control-flow linearization
inferred← citeshttps://doi.org/10.1145/3385412.3386030openalex-snapshot
Effective function merging in the SSA form
inferred← citeshttps://doi.org/10.1145/3434312openalex-snapshot
An abstract interpretation for SPMD divergence on reducible control flow graphs
inferred← citeshttps://doi.org/10.1145/3470644openalex-snapshot
Pointer-Based Divergence Analysis for OpenCL 2.0 Programs
inferred← citeshttps://doi.org/10.1145/3559009.3569663openalex-snapshot
Combining Run-Time Checks and Compile-Time Analysis to Improve Control Flow Auto-Vectorization
inferred← citeshttps://doi.org/10.1145/3579990.3580019openalex-snapshot
Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows
inferred← citeshttps://doi.org/10.1145/3594736openalex-snapshot
Side-channel Elimination via Partial Control-flow Linearization
inferred← citeshttps://doi.org/10.1145/3626957openalex-snapshot
Divergence Reduction in Monte Carlo Neutron Transport with On-GPU Asynchronous Scheduling
inferred← citeshttps://doi.org/10.1145/3771775.3786275openalex-snapshot
Inside VOLT: Designing an Open-Source GPU Compiler (Tool)
inferred← citeshttps://doi.org/10.17706/jsw.12.6.406-425openalex-snapshot
A Systematic Method for Detecting Parallelized Software Bottlenecks and Suggesting Modifications: The Case of the Expectation Maximization Algorithm
inferred← citeshttps://doi.org/10.17760/d20294182openalex-snapshot
Improving GPU performance through instruction redistribution and diversification
inferred← citeshttps://doi.org/10.18489/sacj.v53i0.195openalex-snapshot
Identifying attributes of GPU programs for difficulty evaluation
inferred← citeshttps://doi.org/10.2197/ipsjjip.30.164openalex-snapshot
Scalar Replacement Considering Branch Divergence
inferred← citeshttps://doi.org/10.23919/date.2019.8715160openalex-snapshot
CUDA au Coq: A Framework for Machine-validating GPU Assembly Programs
inferred← citeshttps://doi.org/10.4230/oasics.wcet.2014.43openalex-snapshot
On Static Timing Analysis of GPU Kernels
inferred← citeshttps://doi.org/10.5555/2738600.2738632openalex-snapshot
Locality-centric thread scheduling for bulk-synchronous programming models on CPU architectures
inferred← citeshttps://doi.org/10.5555/3049832.3049838openalex-snapshot
TwinKernels: an execution model to improve GPU hardware scheduling at compile time
inferred← citeshttps://doi.org/10.5753/jidm.2013.1469openalex-snapshot
Processing XPath Structural Constraints on GPU
inferred← citeshttps://doi.org/10.5821/dissertation-2117-96011openalex-snapshot
SIMD@OpenMP : a programming model approach to leverage SIMD features
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