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On-Chip Memory Based Binarized Convolutional Deep Neural Network Applying Batch Normalization Free Technique on an FPGA
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Outgoing claims: the papers this work cites, builds on, or argues with.
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Memory access optimized routing scheme for deep networks on a mobile coprocessor
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A Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA (Abstract Only)
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Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shift
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Approximate computing for embedded machine learning
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