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APRES: Improving Cache Efficiency by Exploiting Load Characteristics on GPUs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/12.381947openalex-snapshot
Effective hardware-based data prefetching for high-performance processors
inferredcites →https://doi.org/10.1109/hpca.2014.6835938openalex-snapshot
MRPB: Memory request prioritization for massively parallel processors
inferredcites →https://doi.org/10.1109/hpca.2014.6835970openalex-snapshot
Spare register aware prefetching for graph algorithms on GPUs
inferredcites →https://doi.org/10.1109/hpca.2015.7056031openalex-snapshot
Mascar: Speeding up GPU warps by reducing memory pitstops
inferredcites →https://doi.org/10.1109/hpca.2016.7446062openalex-snapshot
Warped-preexecution: A GPU pre-execution approach for improving latency hiding
inferredcites →https://doi.org/10.1109/iccd.1996.563561openalex-snapshot
Branch-directed and stride-based data cache prefetching
inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot
Rodinia: A benchmark suite for heterogeneous computing
inferredcites →https://doi.org/10.1109/isca.1990.134547openalex-snapshot
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
inferredcites →https://doi.org/10.1109/isca.1994.288164openalex-snapshot
Evaluating stream buffers as a secondary cache replacement
inferredcites →https://doi.org/10.1109/isca.2016.29openalex-snapshot
Warped-Slicer: Efficient Intra-SM Slicing through Dynamic Resource Partitioning for GPU Multiprogramming
inferredcites →https://doi.org/10.1109/isca.2016.59openalex-snapshot
Virtual Thread: Maximizing Thread-Level Parallelism beyond GPU Scheduling Limit
inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot
Analyzing CUDA workloads using a detailed GPU simulator
inferredcites →https://doi.org/10.1109/ispass.2014.6844477openalex-snapshot
Characterizing the latency hiding ability of GPUs
inferredcites →https://doi.org/10.1109/ispass.2014.6844487openalex-snapshot
Understanding the tradeoffs between software-managed vs. hardware-managed caches in GPUs
inferredcites →https://doi.org/10.1109/ispass.2015.7095804openalex-snapshot
DRAW: investigating benefits of adaptive fetch group size on GPU
inferredcites →https://doi.org/10.1109/micro.1992.697004openalex-snapshot
Stride Directed Prefetching In Scalar Processors
inferredcites →https://doi.org/10.1109/micro.2010.44openalex-snapshot
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
inferredcites →https://doi.org/10.1109/micro.2012.16openalex-snapshot
Cache-Conscious Wavefront Scheduling
inferredcites →https://doi.org/10.1109/micro.2012.18openalex-snapshot
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor
inferredcites →https://doi.org/10.1109/micro.2014.11openalex-snapshot
Adaptive Cache Management for Energy-Efficient GPU Computing
inferredcites →https://doi.org/10.1109/pact.2013.6618798openalex-snapshot
APOGEE: adaptive prefetching on GPUs for energy efficiency
inferredcites →https://doi.org/10.1109/sc.2014.16openalex-snapshot
Managing DRAM Latency Divergence in Irregular GPGPU Applications
inferredcites →https://doi.org/10.1109/tc.2003.1183943openalex-snapshot
A decoupled predictor-directed stream prefetching architecture
inferredcites →https://doi.org/10.1145/1555754.1555775openalex-snapshot
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness
inferredcites →https://doi.org/10.1145/2000064.2000093openalex-snapshot
Energy-efficient mechanisms for managing thread context in throughput processors
inferredcites →https://doi.org/10.1145/2155620.2155656openalex-snapshot
Improving GPU performance via large warps and two-level warp scheduling
inferredcites →https://doi.org/10.1145/2304576.2304582openalex-snapshot
Characterizing and improving the use of demand-fetched caches in GPUs
inferredcites →https://doi.org/10.1145/2485922.2485951openalex-snapshot
Orchestrated scheduling and prefetching for GPGPUs
inferredcites →https://doi.org/10.1145/2540708.2540717openalex-snapshot
A locality-aware memory hierarchy for energy-efficient GPU architectures
inferredcites →https://doi.org/10.1145/2540708.2540718openalex-snapshot
Divergence-aware warp scheduling
inferredcites →https://doi.org/10.1145/264107.264207openalex-snapshot
Prefetching using Markov predictors
inferredcites →https://doi.org/10.5555/2523721.2523745openalex-snapshot
Neither more nor less: optimizing thread-level parallelism for GPGPUs
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1016/j.mejo.2023.105825openalex-snapshot
Re-Cache: Mitigating cache contention by exploiting locality characteristics with reconfigurable memory hierarchy for GPGPUs
inferred← citeshttps://doi.org/10.1109/hpca.2018.00041openalex-snapshot
WIR: Warp Instruction Reuse to Minimize Repeated Computations in GPUs
inferred← citeshttps://doi.org/10.1109/hpca57654.2024.00086openalex-snapshot
WASP: Exploiting GPU Pipeline Parallelism with Hardware-Accelerated Automatic Warp Specialization
inferred← citeshttps://doi.org/10.1109/isca.2016.59openalex-snapshot
Virtual Thread: Maximizing Thread-Level Parallelism beyond GPU Scheduling Limit
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00029openalex-snapshot
A Case for Speculative Address Translation with Rapid Validation for GPUs
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00081openalex-snapshot
LIBRA: Memory Bandwidth- and Locality-Aware Parallel Tile Rendering
inferred← citeshttps://doi.org/10.1109/tc.2026.3688223openalex-snapshot
On-the-Fly Memory Decompression in GPU Featuring In-Partition Compressed Block Prefetching and Gzip Decompression for Scientific Computing
inferred← citeshttps://doi.org/10.1145/3079856.3080239openalex-snapshot
Access Pattern-Aware Cache Management for Improving Data Utilization in GPU
inferred← citeshttps://doi.org/10.1145/3140659.3080239openalex-snapshot
Access Pattern-Aware Cache Management for Improving Data Utilization in GPU
inferred← citeshttps://doi.org/10.1145/3287318openalex-snapshot
Quantifying Data Locality in Dynamic Parallelism in GPUs
inferred← citeshttps://doi.org/10.1145/3725843.3756090openalex-snapshot
Leveraging Chiplet-Locality for Efficient Memory Mapping in Multi-Chip Module GPUs
inferred← citeshttps://doi.org/10.17760/d20382826openalex-snapshot
Hint-assisted scheduling on modern GPUs
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