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Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/(sici)1096-908x(199811/12)10:6<415::aid-smr180>3.0.co;2-zopenalex-snapshot
A new algorithm for slicing unstructured programs
inferredcites →https://doi.org/10.1016/c2013-0-15557-2openalex-snapshot
Physically Based Rendering: From Theory to Implementation
inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot
Analyzing CUDA workloads using a detailed GPU simulator
inferredcites →https://doi.org/10.1109/ispass.2010.5452029openalex-snapshot
Visualizing complex dynamics in many-core accelerator architectures
inferredcites →https://doi.org/10.1109/mc.2003.1220582openalex-snapshot
Programmable stream processors
inferredcites →https://doi.org/10.1109/mc.2008.209openalex-snapshot
Amdahl's Law in the Multicore Era
inferredcites →https://doi.org/10.1109/micro.1998.742118openalex-snapshot
A bandwidth-efficient architecture for media processing
inferredcites →https://doi.org/10.1109/micro.2007.12openalex-snapshot
Microarchitectural Design Space Exploration Using an Architecture-Centric Approach
inferredcites →https://doi.org/10.1109/micro.2007.30openalex-snapshot
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow
inferredcites →https://doi.org/10.1109/rt.2006.280210openalex-snapshot
Ray Tracing on the Cell Processor
inferredcites →https://doi.org/10.1145/1198555.1198798openalex-snapshot
Ray tracing on programmable graphics hardware
inferredcites →https://doi.org/10.1145/1572769.1572792openalex-snapshot
Understanding the efficiency of ray traversal on GPUs
inferredcites →https://doi.org/10.1145/358876.358882openalex-snapshot
An improved illumination model for shaded display
inferredcites →https://doi.org/10.1145/361002.361007openalex-snapshot
Multidimensional binary search trees used for associative searching
inferredcites →https://doi.org/10.22028/d291-25785openalex-snapshot
Realtime ray tracing and interactive global illumination
inferredcites →https://doi.org/10.5555/1413957.1413967openalex-snapshot
On dynamic load balancing on graphics processors
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-01759-9openalex-snapshot
General-Purpose Graphics Processor Architectures
inferred← citeshttps://doi.org/10.1007/s11390-015-1500-yopenalex-snapshot
CUDA-NP: Realizing Nested Thread-Level Parallelism in GPGPU Applications
inferred← citeshttps://doi.org/10.1016/j.jpdc.2018.11.012openalex-snapshot
A survey of architectural approaches for improving GPGPU performance, programmability and heterogeneity
inferred← citeshttps://doi.org/10.1109/isca.2014.6853209openalex-snapshot
Fine-grain task aggregation and coordination on GPUs
inferred← citeshttps://doi.org/10.1109/isca.2016.57openalex-snapshot
LaPerm: Locality Aware Scheduler for Dynamic Parallelism on GPUs
inferred← citeshttps://doi.org/10.1109/pact.2015.31openalex-snapshot
Phase Aware Warp Scheduling: Mitigating Effects of Phase Behavior in GPGPU Applications
inferred← citeshttps://doi.org/10.1109/pdp.2012.62openalex-snapshot
SIMT Microscheduling: Reducing Thread Stalling in Divergent Iterative Algorithms
inferred← citeshttps://doi.org/10.1109/tcsi.2012.2209302openalex-snapshot
A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory
inferred← citeshttps://doi.org/10.1109/tpds.2014.2324587openalex-snapshot
Loop Optimization for Divergence Reduction on GPUs with SIMT Architecture
inferred← citeshttps://doi.org/10.1145/2259016.2259020openalex-snapshot
Dynamic compilation of data-parallel kernels for vector processors
inferred← citeshttps://doi.org/10.1145/2678373.2665701openalex-snapshot
Fine-grain task aggregation and coordination on GPUs
inferred← citeshttps://doi.org/10.1145/2737924.2738004openalex-snapshot
Efficient execution of recursive programs on commodity vector hardware
inferred← citeshttps://doi.org/10.1145/2813885.2738004openalex-snapshot
Efficient execution of recursive programs on commodity vector hardware
inferred← citeshttps://doi.org/10.1145/3123939.3124532openalex-snapshot
Unleashing the power of GPU for physically-based rendering via dynamic ray shuffling
inferred← citeshttps://doi.org/10.1145/3151035openalex-snapshot
Improving the Efficiency of GPGPU Work-Queue Through Data Awareness
inferred← citeshttps://doi.org/10.1145/3365663openalex-snapshot
Extracting SIMD Parallelism from Recursive Task-Parallel Programs
inferred← citeshttps://doi.org/10.1145/3466752.3480097openalex-snapshot
Intersection Prediction for Accelerated GPU Ray Tracing
inferred← citeshttps://doi.org/10.1145/3695053.3731104openalex-snapshot
AQB8: Energy-Efficient Ray Tracing Accelerator through Multi-Level Quantization
inferred← citeshttps://doi.org/10.1186/s13673-014-0016-8openalex-snapshot
An optimizing pipeline stall reduction algorithm for power and performance on multi-core CPUs
inferred← citeshttps://doi.org/10.14288/1.0167110openalex-snapshot
GPU computing architecture for irregular parallelism
inferred← citeshttps://doi.org/10.2200/s00848ed1v01y201804cac044openalex-snapshot
General-Purpose Graphics Processor Architectures
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