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Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-540-77220-0_21openalex-snapshot
Accelerating Large Graph Algorithms on the GPU Using CUDA
inferredcites →https://doi.org/10.1109/hpca.2011.5749714openalex-snapshot
Thread block compaction for efficient SIMT control flow
inferredcites →https://doi.org/10.1109/iiswc.2009.5306801openalex-snapshot
A characterization and analysis of PTX kernels
inferredcites →https://doi.org/10.1109/iiswc.2012.6402918openalex-snapshot
A quantitative study of irregular programs on GPUs
inferredcites →https://doi.org/10.1109/ipdps.2011.59openalex-snapshot
Computing Strongly Connected Components in Parallel on CUDA
inferredcites →https://doi.org/10.1109/ipdps.2013.28openalex-snapshot
Data-Driven Versus Topology-driven Irregular Computations on GPUs
inferredcites →https://doi.org/10.1109/isca.2012.6237006openalex-snapshot
CAPRI: Prediction of compaction-adequacy for handling control-divergence in GPGPU architectures
inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot
Analyzing CUDA workloads using a detailed GPU simulator
inferredcites →https://doi.org/10.1109/micro.2007.12openalex-snapshot
Microarchitectural Design Space Exploration Using an Architecture-Centric Approach
inferredcites →https://doi.org/10.1109/micro.2007.30openalex-snapshot
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow
inferredcites →https://doi.org/10.1109/micro.2010.44openalex-snapshot
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
inferredcites →https://doi.org/10.1109/micro.2012.18openalex-snapshot
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor
inferredcites →https://doi.org/10.1145/1654059.1654082openalex-snapshot
Increasing memory miss tolerance for SIMD cores
inferredcites →https://doi.org/10.1145/1693453.1693457openalex-snapshot
Structure-driven optimizations for amorphous data-parallel programs
inferredcites →https://doi.org/10.1145/1735970.1736055openalex-snapshot
Flexible architectural support for fine-grain scheduling
inferredcites →https://doi.org/10.1145/1736020.1736055openalex-snapshot
Flexible architectural support for fine-grain scheduling
inferredcites →https://doi.org/10.1145/1815961.1815992openalex-snapshot
Dynamic warp subdivision for integrated branch and memory divergence tolerance
inferredcites →https://doi.org/10.1145/1837274.1837289openalex-snapshot
An effective GPU implementation of breadth-first search
inferredcites →https://doi.org/10.1145/1941553.1941590openalex-snapshot
Accelerating CUDA graph algorithms at maximum warp
inferredcites →https://doi.org/10.1145/1993316.1993501openalex-snapshot
The tao of parallelism in algorithms
inferredcites →https://doi.org/10.1145/1993498.1993501openalex-snapshot
The tao of parallelism in algorithms
inferredcites →https://doi.org/10.1145/2145816.2145831openalex-snapshot
A GPU implementation of inclusion-based points-to analysis
inferredcites →https://doi.org/10.1145/2155620.2155655openalex-snapshot
Hardware transactional memory for GPU architectures
inferredcites →https://doi.org/10.1145/2155620.2155676openalex-snapshot
SIMD re-convergence at thread frontiers
inferredcites →https://doi.org/10.1145/2485922.2485951openalex-snapshot
Orchestrated scheduling and prefetching for GPGPUs
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-01759-9openalex-snapshot
General-Purpose Graphics Processor Architectures
inferred← citeshttps://doi.org/10.1016/j.jpdc.2018.11.012openalex-snapshot
A survey of architectural approaches for improving GPGPU performance, programmability and heterogeneity
inferred← citeshttps://doi.org/10.1109/hpca.2017.14openalex-snapshot
Controlled Kernel Launch for Dynamic Parallelism in GPUs
inferred← citeshttps://doi.org/10.1109/hpca47549.2020.00054openalex-snapshot
HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems
inferred← citeshttps://doi.org/10.1109/hpca53966.2022.00056openalex-snapshot
Only Buffer When You Need To: Reducing On-chip GPU Traffic with Reconfigurable Local Atomic Buffers
inferred← citeshttps://doi.org/10.1109/iccad.2015.7372648openalex-snapshot
Hardware accelerator design for data centers
inferred← citeshttps://doi.org/10.1109/iccd46524.2019.00042openalex-snapshot
Fine-Grained Management of Thread Blocks for Irregular Applications
inferred← citeshttps://doi.org/10.1109/iiswc.2017.8167781openalex-snapshot
HeteroSync: A benchmark suite for fine-grained synchronization on tightly coupled GPUs
inferred← citeshttps://doi.org/10.1109/iiswc66894.2025.00028openalex-snapshot
BetterTogether: An Interference-Aware Framework for Fine-grained Software Pipelining on Heterogeneous SoCs
inferred← citeshttps://doi.org/10.1109/ipdpsw.2016.205openalex-snapshot
Fine-Grained Task Migration for Graph Algorithms Using Processing in Memory
inferred← citeshttps://doi.org/10.1109/isca.2016.24openalex-snapshot
Energy Efficient Architecture for Graph Analytics Accelerators
inferred← citeshttps://doi.org/10.1109/isca.2016.57openalex-snapshot
LaPerm: Locality Aware Scheduler for Dynamic Parallelism on GPUs
inferred← citeshttps://doi.org/10.1109/isca.2018.00031openalex-snapshot
Spandex: A Flexible Interface for Efficient Heterogeneous Coherence
inferred← citeshttps://doi.org/10.1109/ispass.2016.7482092openalex-snapshot
GSI: A GPU Stall Inspector to characterize the sources of memory stalls for tightly coupled GPUs
inferred← citeshttps://doi.org/10.1109/ispass48437.2020.00027openalex-snapshot
Specializing Coherence, Consistency, and Push/Pull for GPU Graph Analytics
inferred← citeshttps://doi.org/10.1109/ispass57527.2023.00028openalex-snapshot
Redwood: Flexible and Portable Heterogeneous Tree Traversal Workloads
inferred← citeshttps://doi.org/10.1109/mascots.2017.15openalex-snapshot
Performance Evaluation of Priority Queues for Fine-Grained Parallel Tasks on GPUs
inferred← citeshttps://doi.org/10.1109/pact.2017.22openalex-snapshot
POSTER: DaQueue: A Data-Aware Work-Queue Design for GPGPUs
inferred← citeshttps://doi.org/10.1109/sc.2016.76openalex-snapshot
Enabling Efficient Preemption for SIMT Architectures with Lightweight Context Switching
inferred← citeshttps://doi.org/10.1109/tcad.2018.2858366openalex-snapshot
Optimizing Graph Algorithms in Asymmetric Multicore Processors
inferred← citeshttps://doi.org/10.1109/tcad.2025.3568347openalex-snapshot
MAP-SIM: A DNN-Specific Mapping Optimization Framework for Shared-Memory CPU-Systolic Array Architectures
inferred← citeshttps://doi.org/10.1109/tpds.2021.3115630openalex-snapshot
A Survey of GPU Multitasking Methods Supported by Hardware Architecture
inferred← citeshttps://doi.org/10.1109/tpds.2022.3218508openalex-snapshot
Improving the Scalability of GPU Synchronization Primitives
inferred← citeshttps://doi.org/10.1145/2830772.2830796openalex-snapshot
Efficient warp execution in presence of divergence with collaborative context collection
inferred← citeshttps://doi.org/10.1145/2830772.2830821openalex-snapshot
Efficient GPU synchronization without scopes
inferred← citeshttps://doi.org/10.1145/3007787.3001155openalex-snapshot
Energy efficient architecture for graph analytics accelerators
inferred← citeshttps://doi.org/10.1145/3151035openalex-snapshot
Improving the Efficiency of GPGPU Work-Queue Through Data Awareness
inferred← citeshttps://doi.org/10.2200/s00848ed1v01y201804cac044openalex-snapshot
General-Purpose Graphics Processor Architectures
inferred← citeshttps://doi.org/10.5555/2840819.2840926openalex-snapshot
Hardware Accelerator Design for Data Centers
inferred← citeshttps://doi.org/10.5555/3014904.3015007openalex-snapshot
Enabling efficient preemption for SIMT architectures with lightweight context switching
inferred← citeshttps://doi.org/10.5821/dissertation-2117-344358openalex-snapshot
High-performance and energy-efficient irregular graph processing on GPU architectures
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