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Enabling Efficient Preemption for SIMT Architectures with Lightweight Context Switching
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-642-14122-5_8openalex-snapshot
Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations
inferredcites →https://doi.org/10.1016/0141-9331(95)93086-xopenalex-snapshot
Fast context switches: compiler and architectural support for preemptive scheduling
inferredcites →https://doi.org/10.1109/ecrts.2012.15openalex-snapshot
Supporting Preemptive Task Executions and Memory Copies in GPGPUs
inferredcites →https://doi.org/10.1109/hpca.2012.6168946openalex-snapshot
The case for GPGPU spatial multitasking
inferredcites →https://doi.org/10.1109/hpca.2013.6522337openalex-snapshot
Warped register file: A power efficient register file for GPGPUs
inferredcites →https://doi.org/10.1109/hpca.2013.6522352openalex-snapshot
The dual-path execution model for efficient GPU control flow
inferredcites →https://doi.org/10.1109/hpca.2014.6835937openalex-snapshot
Improving GPGPU resource utilization through alternative thread block scheduling
inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot
Rodinia: A benchmark suite for heterogeneous computing
inferredcites →https://doi.org/10.1109/inpar.2012.6339596openalex-snapshot
A study of Persistent Threads style GPU programming for GPGPU workloads
inferredcites →https://doi.org/10.1109/isca.2014.6853208openalex-snapshot
Enabling preemptive multiprogramming on GPUs
inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot
Analyzing CUDA workloads using a detailed GPU simulator
inferredcites →https://doi.org/10.1109/micro.2012.18openalex-snapshot
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor
inferredcites →https://doi.org/10.1109/micro.2014.24openalex-snapshot
Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists
inferredcites →https://doi.org/10.1109/rtss.2011.13openalex-snapshot
RGEM: A Responsive GPGPU Execution Model for Runtime Engines
inferredcites →https://doi.org/10.1145/1146909.1147001openalex-snapshot
Rapid and low-cost context-switch through embedded processor customization for real-time and control applications
inferredcites →https://doi.org/10.1145/2155620.2155637openalex-snapshot
Idempotent processor architecture
inferredcites →https://doi.org/10.1145/2451116.2451160openalex-snapshot
Improving GPGPU concurrency with elastic kernels
inferredcites →https://doi.org/10.1145/2830772.2830784openalex-snapshot
GPU register file virtualization
inferredcites →https://doi.org/10.5555/2342788.2342798openalex-snapshot
Fine-grained resource sharing for concurrent GPGPU kernels
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-030-85665-6_6openalex-snapshot
Collaborative GPU Preemption via Spatial Multitasking for Efficient GPU Sharing
inferred← citeshttps://doi.org/10.1109/dac.2018.8465929openalex-snapshot
PEP: Proactive Checkpointing for Efficient Preemption on GPUs
inferred← citeshttps://doi.org/10.1109/hipc53243.2021.00063openalex-snapshot
PILOT: a Runtime System to Manage Multi-tenant GPU Unified Memory Footprint
inferred← citeshttps://doi.org/10.1109/hpca.2019.00013openalex-snapshot
PIM-VR: Erasing Motion Anomalies In Highly-Interactive Virtual Reality World with Customized Memory Cube
inferred← citeshttps://doi.org/10.1109/hpca47549.2020.00027openalex-snapshot
PREMA: A Predictive Multi-Task Scheduling Algorithm For Preemptible Neural Processing Units
inferred← citeshttps://doi.org/10.1109/iccad.2017.8203754openalex-snapshot
Exploring cache bypassing and partitioning for multi-tasking on GPUs
inferred← citeshttps://doi.org/10.1109/icnp.2018.00025openalex-snapshot
Grus: Enabling Latency SLOs for GPU-Accelerated NFV Systems
inferred← citeshttps://doi.org/10.1109/iiswc50251.2020.00032openalex-snapshot
Scalable and Fast Lazy Persistency on GPUs
inferred← citeshttps://doi.org/10.1109/ipdps49936.2021.00021openalex-snapshot
CTXBack: Enabling Low Latency GPU Context Switching via Context Flashback
inferred← citeshttps://doi.org/10.1109/ipdps53621.2022.00078openalex-snapshot
Compiler-Directed Incremental Checkpointing for Low Latency GPU Preemption
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00087openalex-snapshot
Independent Forward Progress of Work-groups
inferred← citeshttps://doi.org/10.1109/micro.2018.00078openalex-snapshot
Architectural Support for Efficient Large-Scale Automata Processing
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00062openalex-snapshot
Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00011openalex-snapshot
Hardware-Assisted Virtualization of Neural Processing Units for Cloud Platforms
inferred← citeshttps://doi.org/10.1109/rtas.2018.00029openalex-snapshot
A GPU Kernel Transactionization Scheme for Preemptive Priority Scheduling
inferred← citeshttps://doi.org/10.1109/rtss62706.2024.00032openalex-snapshot
Jigsaw: Taming BEV-centric Perception on Dual-SoC for Autonomous Driving
inferred← citeshttps://doi.org/10.1109/tc.2017.2776272openalex-snapshot
CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs
inferred← citeshttps://doi.org/10.1109/tc.2020.2988251openalex-snapshot
Idempotence-Based Preemptive GPU Kernel Scheduling for Embedded Systems
inferred← citeshttps://doi.org/10.1109/tcad.2018.2883906openalex-snapshot
A Dynamic and Proactive GPU Preemption Mechanism Using Checkpointing
inferred← citeshttps://doi.org/10.1109/tpds.2018.2848621openalex-snapshot
SMGuard: A Flexible and Fine-Grained Resource Management Framework for GPUs
inferred← citeshttps://doi.org/10.1109/tpds.2021.3115630openalex-snapshot
A Survey of GPU Multitasking Methods Supported by Hardware Architecture
inferred← citeshttps://doi.org/10.1145/3543712.3543756openalex-snapshot
A new preemptive task scheduling framework for heterogeneous embedded systems
inferred← citeshttps://doi.org/10.1145/3689031.3717466openalex-snapshot
Comprehensive Deadlock Prevention for GPU Collective Communication
inferred← citeshttps://doi.org/10.1145/3694906.3743331openalex-snapshot
ReFINE: A Reactive and Fine-Grained Scheduling Framework For Concurrency on General Purpose GPUs
inferred← citeshttps://doi.org/10.1145/3695053.3731002openalex-snapshot
Topology-Aware Virtualization over Inter-Core Connected Neural Processing Units
inferred← citeshttps://doi.org/10.5821/dissertation-2117-114621openalex-snapshot
Multicore architecture optimizations for HPC applications
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