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Convolution engine

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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/11744023_32openalex-snapshot
SURF: Speeded Up Robust Features
inferredcites →https://doi.org/10.1007/s11767-006-0096-3openalex-snapshot
An adaptive color plane interpolation method based on edge detection
inferredcites →https://doi.org/10.1023/b:visi.0000029664.99615.94openalex-snapshot
Distinctive Image Features from Scale-Invariant Keypoints
inferredcites →https://doi.org/10.1109/40.848473openalex-snapshot
Xtensa: a configurable and extensible processor
inferredcites →https://doi.org/10.1109/cvpr.2005.166openalex-snapshot
Full-Frame Video Stabilization
inferredcites →https://doi.org/10.1109/hotchips.2011.7477506openalex-snapshot
T4: A highly threaded server-on-a-chip with native support for heterogeneous computing
inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot
Analyzing CUDA workloads using a detailed GPU simulator
inferredcites →https://doi.org/10.1109/l-ca.2008.1openalex-snapshot
An Energy-Efficient Processor Architecture for Embedded Systems
inferredcites →https://doi.org/10.1109/mdt.2010.141openalex-snapshot
Customizable Domain-Specific Computing
inferredcites →https://doi.org/10.1109/mm.2010.81openalex-snapshot
Rethinking Digital Design: Why Design Must Change
inferredcites →https://doi.org/10.1109/mm.2011.3openalex-snapshot
IBM Power Edge of Network Processor: A Wire-Speed System on a Chip
inferredcites →https://doi.org/10.1109/mm.2012.51openalex-snapshot
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing
inferredcites →https://doi.org/10.1109/tcsvt.2006.873163openalex-snapshot
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder
inferredcites →https://doi.org/10.1145/1015706.1015777openalex-snapshot
Digital photography with flash and no-flash image pairs
inferredcites →https://doi.org/10.1145/1103900.1103914openalex-snapshot
High dynamic range imaging
inferredcites →https://doi.org/10.1145/1278480.1278544openalex-snapshot
Chip multi-processor generator
inferredcites →https://doi.org/10.1145/1735971.1736044openalex-snapshot
Conservation cores
inferredcites →https://doi.org/10.1145/1736020.1736044openalex-snapshot
Conservation cores
inferredcites →https://doi.org/10.1145/1778765.1778766openalex-snapshot
The Frankencamera
inferredcites →https://doi.org/10.1145/1815961.1815968openalex-snapshot
Understanding sources of inefficiency in general-purpose chips
inferredcites →https://doi.org/10.1145/2228360.2228472openalex-snapshot
Avoiding game over
inferredcites →https://doi.org/10.1145/2485922.2485964openalex-snapshot
GPUWattch
inferredcites →https://doi.org/10.1145/339647.339708openalex-snapshot
Multiple-banked register file architectures
inferredcites →https://doi.org/10.1364/cosi.2009.ctua1openalex-snapshot
Computational Photography
inferredcites →https://doi.org/10.5555/320080.320093openalex-snapshot
Exploiting a new level of DLP in multimedia applications

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-319-94340-4_4openalex-snapshot
A Reconfigurable Streaming Processor for Real-Time Low-Power Execution of Convolutional Neural Networks at the Edge
inferred← citeshttps://doi.org/10.1007/s11265-023-01869-5openalex-snapshot
Accelerating Image Processing Using Reduced Precision Calculation Convolution Engines
inferred← citeshttps://doi.org/10.1109/access.2021.3066335openalex-snapshot
Impact of NCFET on Neural Network Accelerators
inferred← citeshttps://doi.org/10.1109/access.2022.3229767openalex-snapshot
Efficient Hardware Architectures for Accelerating Deep Neural Networks: Survey
inferred← citeshttps://doi.org/10.1109/hpca61900.2025.00116openalex-snapshot
PIMnet: A Domain-Specific Network for Efficient Collective Communication in Scalable PIM
inferred← citeshttps://doi.org/10.1109/hpec.2018.8547530openalex-snapshot
A Novel 1D-Convolution Accelerator for Low-Power Real-time CNN processing on the Edge
inferred← citeshttps://doi.org/10.1109/isqed60706.2024.10528780openalex-snapshot
Fused Functional Units for Area-Efficient CGRAs
inferred← citeshttps://doi.org/10.1109/isscc42614.2022.9731536openalex-snapshot
The Art of Scaling: Distributed and Connected to Sustain the Golden Age of Computation
inferred← citeshttps://doi.org/10.1109/jiot.2020.2990215openalex-snapshot
AWARE-CNN: Automated Workflow for Application-Aware Real-Time Edge Acceleration of CNNs
inferred← citeshttps://doi.org/10.1109/jproc.2022.3218057openalex-snapshot
Technology Prospects for Data-Intensive Computing
inferred← citeshttps://doi.org/10.1109/jssc.2024.3368350openalex-snapshot
RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM
inferred← citeshttps://doi.org/10.1109/mm.2016.36openalex-snapshot
Accelerating the Accelerator Memory Interface with Access-Execute and Dataflow
inferred← citeshttps://doi.org/10.1109/tpds.2021.3056045openalex-snapshot
Hardware Accelerator Integration Tradeoffs for High-Performance Computing: A Case Study of GEMM Acceleration in N-Body Methods
inferred← citeshttps://doi.org/10.1145/2541940.2541961openalex-snapshot
Q100
inferred← citeshttps://doi.org/10.1145/2593069.2593105openalex-snapshot
CGPA
inferred← citeshttps://doi.org/10.1145/2872362.2872371openalex-snapshot
M3
inferred← citeshttps://doi.org/10.1145/2954679.2872371openalex-snapshot
M3
inferred← citeshttps://doi.org/10.1145/2954680.2872371openalex-snapshot
M3
inferred← citeshttps://doi.org/10.1145/2980024.2872371openalex-snapshot
M3
inferred← citeshttps://doi.org/10.1145/3357375openalex-snapshot
A Survey of Coarse-Grained Reconfigurable Architecture and Design
inferred← citeshttps://doi.org/10.1145/3470496.3533040openalex-snapshot
The Mozart reuse exposed dataflow processor for AI and beyond
inferred← citeshttps://doi.org/10.1145/3503222.3507741openalex-snapshot
Efficient and scalable core multiplexing with M³v
inferred← citeshttps://doi.org/10.1145/3544102openalex-snapshot
Microarchitectural Attacks in Heterogeneous Systems: A Survey
inferred← citeshttps://doi.org/10.1145/3600092openalex-snapshot
Accelerating Convolutional Neural Network by Exploiting Sparsity on GPUs
inferred← citeshttps://doi.org/10.2200/s00677ed1v01y201511cac034openalex-snapshot
Research Infrastructures for Hardware Accelerators
inferred← citeshttps://doi.org/10.24251/hicss.2018.212openalex-snapshot
Coordinating Advanced Crowd Work: Extending Citizen Science
inferred← citeshttps://doi.org/10.48550/arxiv.2104.10415openalex-snapshot
Tackling Variabilities in Autonomous Driving
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