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Microarchitectural Attacks in Heterogeneous Systems: A Survey
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-030-31239-8_11openalex-snapshot
An Efficient Profiling-Based Side-Channel Attack on Graphics Processing Units
inferredcites →https://doi.org/10.1007/978-3-030-42068-0_7openalex-snapshot
Remote Side-Channel Attacks on Heterogeneous SoC
inferredcites →https://doi.org/10.1007/978-3-319-40667-1_14openalex-snapshot
Flush+Flush: A Fast and Stealthy Cache Attack
inferredcites →https://doi.org/10.1007/978-3-319-40667-1_15openalex-snapshot
Rowhammer.js: A Remote Software-Induced Fault Attack in JavaScript
inferredcites →https://doi.org/10.1007/978-3-319-70972-7_13openalex-snapshot
Fantastic Timers and Where to Find Them: High-Resolution Microarchitectural Attacks in JavaScript
inferredcites →https://doi.org/10.1007/s00145-010-9083-9openalex-snapshot
Glitch and Laser Fault Attacks onto a Secure AES Implementation on a SRAM-Based FPGA
inferredcites →https://doi.org/10.1007/s13389-016-0141-6openalex-snapshot
A survey of microarchitectural timing attacks and countermeasures on contemporary hardware
inferredcites →https://doi.org/10.1007/s41635-018-0038-1openalex-snapshot
Fault Attacks on Secure Embedded Software: Threats, Design, and Evaluation
inferredcites →https://doi.org/10.1007/s41635-018-0039-0openalex-snapshot
A Survey of Techniques for Improving Security of GPUs
inferredcites →https://doi.org/10.1007/s41635-018-0046-1openalex-snapshot
Survey of Microarchitectural Side and Covert Channels, Attacks, and Defenses
inferredcites →https://doi.org/10.1016/0026-2692(93)90111-qopenalex-snapshot
Computer architecture: a quantitative approach
inferredcites →https://doi.org/10.1109/acsac.2006.20openalex-snapshot
Covert and Side Channels Due to Processor Architecture
inferredcites →https://doi.org/10.1109/asianhost47458.2019.9006701openalex-snapshot
VoltJockey: Breaking SGX by Software-Controlled Voltage-Induced Hardware Faults
inferredcites →https://doi.org/10.1109/dac.2018.8465856openalex-snapshot
Electro-Magnetic Analysis of GPU-based AES Implementation
inferredcites →https://doi.org/10.1109/dac18072.2020.9218690openalex-snapshot
A Novel GPU Overdrive Fault Attack
inferredcites →https://doi.org/10.1109/dft.2016.7684086openalex-snapshot
Side channel attacks on STTRAM and low-overhead countermeasures
inferredcites →https://doi.org/10.1109/dsn18060.2012openalex-snapshot
IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2012)
inferredcites →https://doi.org/10.1109/eurospw51379.2020.00102openalex-snapshot
Nethammer: Inducing Rowhammer Faults through Network Requests
inferredcites →https://doi.org/10.1109/fccm.2018.00016openalex-snapshot
FPGA Side Channel Attacks without Physical Access
inferredcites →https://doi.org/10.1109/fccm51124.2021.00035openalex-snapshot
Cloud FPGA Cartography using PCIe Contention
inferredcites →https://doi.org/10.1109/fpl.2018.00031openalex-snapshot
A Survey on FPGA Virtualization
inferredcites →https://doi.org/10.1109/fpl.2019.00034openalex-snapshot
Automatic Compiler Based FPGA Accelerator for CNN Training
inferredcites →https://doi.org/10.1109/gcce.2013.6664775openalex-snapshot
Hardware-accelerator design for energy-efficient acoustic feature extraction
inferredcites →https://doi.org/10.1109/hcs18657.2011openalex-snapshot
2011 IEEE Hot Chips 23 Symposium (HCS)
inferredcites →https://doi.org/10.1109/hcs36694.2015openalex-snapshot
2015 IEEE Hot Chips 27 Symposium (HCS)
inferredcites →https://doi.org/10.1109/host49136.2021.9702277openalex-snapshot
Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments
inferredcites →https://doi.org/10.1109/hpca.2016.7446081openalex-snapshot
A complete key recovery timing attack on a GPU
inferredcites →https://doi.org/10.1109/hpca.2016.7446082openalex-snapshot
CATalyst: Defeating last-level cache side channel attacks in cloud computing
inferredcites →https://doi.org/10.1109/hpca47549.2020.00053openalex-snapshot
BCoal: Bucketing-Based Memory Coalescing for Efficient and Secure GPUs
inferredcites →https://doi.org/10.1109/hpca51647.2021.00036openalex-snapshot
Trident: A Hybrid Correlation-Collision GPU Cache Timing Attack for AES Key Recovery
inferredcites →https://doi.org/10.1109/hst.2017.7951835openalex-snapshot
Correlation power analysis attack against STT-MRAM based cyptosystems
inferredcites →https://doi.org/10.1109/iccad.2017.8203770openalex-snapshot
Fault injection attack on deep neural network
inferredcites →https://doi.org/10.1109/iccd.2015.7357115openalex-snapshot
Side-channel power analysis of a GPU AES implementation
inferredcites →https://doi.org/10.1109/iccd.2018.00021openalex-snapshot
Analysis of Row Hammer Attack on STTRAM
inferredcites →https://doi.org/10.1109/iiswc45017.2018openalex-snapshot
2018 IEEE International Symposium on Workload Characterization (IISWC)
inferredcites →https://doi.org/10.1109/isca.2012.6237011openalex-snapshot
TimeWarp: Rethinking timekeeping and performance monitoring mechanisms to mitigate side-channel attacks
inferredcites →https://doi.org/10.1109/isca.2014.6853228openalex-snapshot
Reducing access latency of MLC PCMs through line striping
inferredcites →https://doi.org/10.1109/isca19853.2012openalex-snapshot
2012 39th Annual International Symposium on Computer Architecture (ISCA)
inferredcites →https://doi.org/10.1109/isca32457.2014openalex-snapshot
2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)
inferredcites →https://doi.org/10.1109/isca41472.2018openalex-snapshot
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA)
inferredcites →https://doi.org/10.1109/isca45697.2020.00065openalex-snapshot
Packet Chasing: Spying on Network Packets over a Cache Side-Channel
inferredcites →https://doi.org/10.1109/ispass.2013.6557176openalex-snapshot
Evaluating STT-RAM as an energy-efficient main memory alternative
inferredcites →https://doi.org/10.1109/jproc.2014.2331672openalex-snapshot
FPGA Security: Motivations, Features, and Applications
inferredcites →https://doi.org/10.1109/jssc.1974.1050511openalex-snapshot
Design of ion-implanted MOSFET's with very small physical dimensions
inferredcites →https://doi.org/10.1109/lca.2015.2445337openalex-snapshot
Security Implications of Third-Party Accelerators
inferredcites →https://doi.org/10.1109/lca.2018.2860006openalex-snapshot
A New Class of Covert Channels Exploiting Power Management Vulnerabilities
inferredcites →https://doi.org/10.1109/mdt.2010.7openalex-snapshot
A Survey of Hardware Trojan Taxonomy and Detection
inferredcites →https://doi.org/10.1109/micro.2014.42openalex-snapshot
CC-Hunter: Uncovering Covert Timing Channels on Shared Processor Hardware
inferredcites →https://doi.org/10.1109/micro.2018.00068openalex-snapshot
CEASER: Mitigating Conflict-Based Cache Attacks via Encrypted-Address and Remapping
inferredcites →https://doi.org/10.1109/micro37956.2016openalex-snapshot
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
inferredcites →https://doi.org/10.1109/micro50266.2020.00078openalex-snapshot
GraphPulse: An Event-Driven Hardware Accelerator for Asynchronous Graph Processing
inferredcites →https://doi.org/10.1109/mitp.2023.3246667openalex-snapshot
IEEE Symposium on Security and Privacy
inferredcites →https://doi.org/10.1109/pact.2011.21openalex-snapshot
DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism
inferredcites →https://doi.org/10.1109/sp.2015.42openalex-snapshot
S$A: A Shared Cache Attack That Works across Cores and Defies VM Sandboxing -- and Its Application to AES
inferredcites →https://doi.org/10.1109/sp.2015.43openalex-snapshot
Last-Level Cache Side-Channel Attacks are Practical
inferredcites →https://doi.org/10.1109/sp.2018.00022openalex-snapshot
Grand Pwning Unit: Accelerating Microarchitectural Attacks with the GPU
inferredcites →https://doi.org/10.1109/sp.2019.00004openalex-snapshot
Attack Directories, Not Caches: Side Channel Attacks in a Non-Inclusive World
inferredcites →https://doi.org/10.1109/sp36276.2017openalex-snapshot
2017 IEEE Symposium on Security and Privacy (SP)
inferredcites →https://doi.org/10.1109/sp40000.2020.00070openalex-snapshot
C 3 APSULe: Cross-FPGA Covert-Channel Attacks through Power Supply Unit Leakage
inferredcites →https://doi.org/10.1109/sp40000.2020.00082openalex-snapshot
NetCAT: Practical Cache Attacks from the Network
inferredcites →https://doi.org/10.1109/sp40001.2021.00011openalex-snapshot
Systematic Analysis of Randomization-based Protected Cache Architectures
inferredcites →https://doi.org/10.1109/sp40001.2021.00020openalex-snapshot
CrossTalk: Speculative Data Leaks Across Cores Are Real
inferredcites →https://doi.org/10.1109/sp40001.2021.00059openalex-snapshot
Invisible Probe: Timing Attacks with PCIe Congestion Side-channel
inferredcites →https://doi.org/10.1109/sp40001.2021.00063openalex-snapshot
PLATYPUS: Software-based Power Side-Channel Attacks on x86
inferredcites →https://doi.org/10.1109/spw50608.2020openalex-snapshot
2020 IEEE Security and Privacy Workshops (SPW)
inferredcites →https://doi.org/10.1109/tcsi.2020.2983185openalex-snapshot
VPQC: A Domain-Specific Vector Processor for Post-Quantum Cryptography Based on RISC-V Architecture
inferredcites →https://doi.org/10.1145/1653662.1653687openalex-snapshot
Hey, you, get off of my cloud
inferredcites →https://doi.org/10.1145/1815961.1815968openalex-snapshot
Understanding sources of inefficiency in general-purpose chips
inferredcites →https://doi.org/10.1145/2046707.2046722openalex-snapshot
On the vulnerability of FPGA bitstream encryption against power analysis attacks
inferredcites →https://doi.org/10.1145/2228360.2228448openalex-snapshot
Hardware realization of BSB recall function using memristor crossbar arrays
inferredcites →https://doi.org/10.1145/2487726.2488368openalex-snapshot
Innovative instructions and software model for isolated execution
inferredcites →https://doi.org/10.1145/2810103.2813719openalex-snapshot
Trusted Display on Untrusted Commodity Platforms
inferredcites →https://doi.org/10.1145/2870636openalex-snapshot
Understanding and Mitigating Covert Channels Through Branch Predictors
inferredcites →https://doi.org/10.1145/2872887.2750386openalex-snapshot
A scalable processing-in-memory accelerator for parallel graph processing
inferredcites →https://doi.org/10.1145/2897937.2897962openalex-snapshot
A high-resolution side-channel attack on last-level cache
inferredcites →https://doi.org/10.1145/2976749.2978374openalex-snapshot
Covert Channels through Random Number Generator
inferredcites →https://doi.org/10.1145/3060403.3060462openalex-snapshot
A Novel Side-Channel Timing Attack on GPUs
inferredcites →https://doi.org/10.1145/3214292.3214302openalex-snapshot
Fault injection attacks on emerging non-volatile memory and countermeasures
inferredcites →https://doi.org/10.1145/3289602.3293920openalex-snapshot
Temporal Thermal Covert Channels in Cloud FPGAs
inferredcites →https://doi.org/10.1145/3297858.3304021openalex-snapshot
Heterogeneous Isolated Execution for Commodity GPUs
inferredcites →https://doi.org/10.1145/3337167.3337169openalex-snapshot
Cracking Randomized Coalescing Techniques with An Efficient Profiling-Based Side-Channel Attack to GPU
inferredcites →https://doi.org/10.1145/3341729openalex-snapshot
Side-channel Timing Attack of RSA on a GPU
inferredcites →https://doi.org/10.1145/3361682openalex-snapshot
Domain-specific hardware accelerators
inferredcites →https://doi.org/10.1145/3373376.3378532openalex-snapshot
DNNGuard: An Elastic Heterogeneous DNN Accelerator Architecture against Adversarial Attacks
inferredcites →https://doi.org/10.1145/3400302.3415695openalex-snapshot
Information leakage from FPGA routing and logic elements
inferredcites →https://doi.org/10.1145/3419100openalex-snapshot
Trust in FPGA-accelerated Cloud Computing
inferredcites →https://doi.org/10.1145/3433210.3453077openalex-snapshot
(Mis)managed: A Novel TLB-based Covert Channel on GPUs
inferredcites →https://doi.org/10.1145/3442479openalex-snapshot
Survey of Transient Execution Attacks and Their Mitigations
inferredcites →https://doi.org/10.1145/3445814.3446747openalex-snapshot
Defensive approximation: securing CNNs using approximate computing
inferredcites →https://doi.org/10.1145/3466752.3480093openalex-snapshot
Network-on-Chip Microarchitecture-based Covert Channel in GPUs
inferredcites →https://doi.org/10.14722/ndss.2022.24093openalex-snapshot
DRAWN APART : A Device Identification Technique based on Remote GPU Fingerprinting
inferredcites →https://doi.org/10.1524/itit.46.2.103.29083openalex-snapshot
International Symposium on Computer Architecture (ISCA 2004)
inferredcites →https://doi.org/10.23919/date48585.2020.9116481openalex-snapshot
Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?
inferredcites →https://doi.org/10.23919/date54114.2022.9774663openalex-snapshot
FPGA-to-CPU Undervolting Attacks
inferredcites →https://doi.org/10.46586/tches.v2018.i3.44-68openalex-snapshot
FPGAhammer: Remote Voltage Fault Attacks on Shared FPGAs, suitable for DFA on AES
inferredcites →https://doi.org/10.46586/tches.v2018.i3.573-595openalex-snapshot
Key Extraction Using Thermal Laser Stimulation
inferredcites →https://doi.org/10.46586/tches.v2020.i3.169-195openalex-snapshot
JackHammer: Efficient Rowhammer on Heterogeneous FPGA-CPU Platforms
inferredcites →https://doi.org/10.48550/arxiv.1412.6572openalex-snapshot
Explaining and Harnessing Adversarial Examples
inferredcites →https://doi.org/10.48550/arxiv.1612.03182openalex-snapshot
Arch2030: A Vision of Computer Architecture Research over the Next 15 Years
inferredcites →https://doi.org/10.48550/arxiv.1802.03802openalex-snapshot
MeltdownPrime and SpectrePrime: Automatically-Synthesized Attacks Exploiting Invalidation-Based Coherence Protocols
inferredcites →https://doi.org/10.48550/arxiv.2009.13914openalex-snapshot
SoK: On the Security Challenges and Risks of Multi-Tenant FPGAs in the Cloud
inferredcites →https://doi.org/10.48550/arxiv.2103.04533openalex-snapshot
Volcano: Stateless Cache Side-channel Attack by Exploiting Mesh Interconnect
inferredcites →https://doi.org/10.48550/arxiv.2106.05825openalex-snapshot
HASI: Hardware-Accelerated Stochastic Inference, A Defense Against Adversarial Machine Learning Attacks
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-032-16165-9_20openalex-snapshot
OpenGL GPU-Based Rowhammer Attack (Work in Progress)
inferred← citeshttps://doi.org/10.1016/j.cose.2025.104810openalex-snapshot
Memory under siege: A comprehensive survey of side-Channel attacks on memory
inferred← citeshttps://doi.org/10.1109/access.2023.3269881openalex-snapshot
NG-MVEE: A New Proposed Hybrid Technique for Enhanced Mitigation of Code Re-Use Attack
inferred← citeshttps://doi.org/10.1109/comst.2024.3377531openalex-snapshot
Empowering Cloud Computing With Network Acceleration: A Survey
inferred← citeshttps://doi.org/10.1109/ectc51687.2025.00367openalex-snapshot
Enhancing Runtime Security in Heterogeneous System-in-Package Through a Chiplet-Based Root-of-Trust
inferred← citeshttps://doi.org/10.1109/host55342.2024.10545396openalex-snapshot
Resurrection Attack: Defeating Xilinx MPU's Memory Protection
inferred← citeshttps://doi.org/10.1109/host68814.2026.11604695openalex-snapshot
SnoopyPower! Remote Power Attacks on Cache and Coherence Paths
inferred← citeshttps://doi.org/10.1109/hpca61900.2025.00041openalex-snapshot
Efficient Memory Side-Channel Protection for Embedding Generation in Machine Learning
inferred← citeshttps://doi.org/10.1109/isaics66888.2025.11350282openalex-snapshot
Research on the Security of SRAM base FPGAs in the Era of Artificial Intelligence
inferred← citeshttps://doi.org/10.1109/sp63933.2026.00254openalex-snapshot
Practical Covert Channel Across Isolated Browser Instances via GPU Command Queue Contention
inferred← citeshttps://doi.org/10.1145/3634737.3656283openalex-snapshot
Generic and Automated Drive-by GPU Cache Attacks from the Browser
inferred← citeshttps://doi.org/10.1145/3658644.3690258openalex-snapshot
Whipping the Multivariate-based MAYO Signature Scheme using Hardware Platforms
inferred← citeshttps://doi.org/10.1145/3687463openalex-snapshot
Tutorial: A Novel Runtime Environment for Accelerator-Rich Heterogeneous Architectures
inferred← citeshttps://doi.org/10.3390/computers15090611openalex-snapshot
Redefining Trust at the Memory Wall: The Threat Landscape, an Adversary Model and a Conceptual Framework for Secure Processing-in-Memory
inferred← citeshttps://doi.org/10.70675/0fc3d40bz6a38z4c78z9a9cz4958577081bbopenalex-snapshot
Optimizing data leakage exploitation in the context of screamingchannel attacks
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