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Profiling a warehouse-scale computer

https://doi.org/10.1145/2749469.2750392
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/s00778-007-0044-3openalex-snapshot
Service oriented architectures: approaches, technologies and research issues
inferredcites →https://doi.org/10.1016/0026-2692(93)90111-qopenalex-snapshot
Computer architecture: a quantitative approach
inferredcites →https://doi.org/10.1088/1742-6596/396/5/052072openalex-snapshot
GOoDA: The Generic Optimization Data Analyzer
inferredcites →https://doi.org/10.1109/fpt.2010.5681489openalex-snapshot
FPGA implementation of GZIP compression and decompression for IDC services
inferredcites →https://doi.org/10.1109/hpca.2015.7056045openalex-snapshot
High performing cache hierarchies for server workloads: Relaxing inclusion to capture the latency benefits of exclusive caches
inferredcites →https://doi.org/10.1109/iiswc.2013.6704671openalex-snapshot
Characterizing data analysis workloads in data centers
inferredcites →https://doi.org/10.1109/iiswc.2014.6983037openalex-snapshot
Tradeoffs between power management and tail latency in warehouse-scale applications
inferredcites →https://doi.org/10.1109/iiswc.2014.6983059openalex-snapshot
Deep-dive analysis of the data analytics workload in CloudSuite
inferredcites →https://doi.org/10.1109/isca.2008.37openalex-snapshot
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments
inferredcites →https://doi.org/10.1109/ispass.2014.6844459openalex-snapshot
A Top-Down method for performance analysis and counters architecture
inferredcites →https://doi.org/10.1109/isscc.2015.7062931openalex-snapshot
4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processor
inferredcites →https://doi.org/10.1109/micro.2006.49openalex-snapshot
Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches
inferredcites →https://doi.org/10.1109/mm.2003.1196112openalex-snapshot
Web search for a planet: the google cluster architecture
inferredcites →https://doi.org/10.1109/mm.2007.3openalex-snapshot
A Top-Down Approach to Architecting CPI Component Performance Counters
inferredcites →https://doi.org/10.1109/mm.2010.68openalex-snapshot
Google-Wide Profiling: A Continuous Profiling Infrastructure for Data Centers
inferredcites →https://doi.org/10.1109/mm.2010.73openalex-snapshot
Server Engineering Insights for Large-Scale Online Services
inferredcites →https://doi.org/10.1109/pdcat.2011.18openalex-snapshot
An Experimental Study on Memory Allocators in Multicore and Multithreaded Applications
inferredcites →https://doi.org/10.1109/tc.2010.41openalex-snapshot
Cache-Based Memory Copy Hardware Accelerator for Multicore Systems
inferredcites →https://doi.org/10.1145/1327452.1327491openalex-snapshot
Technical perspective
inferredcites →https://doi.org/10.1145/1394608.1382148openalex-snapshot
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments
inferredcites →https://doi.org/10.1145/1629575.1629577openalex-snapshot
FAWN
inferredcites →https://doi.org/10.1145/1723112.1723148openalex-snapshot
A 1 cycle-per-byte XML parsing accelerator
inferredcites →https://doi.org/10.1145/1772954.1772963openalex-snapshot
Taming hardware event samples for FDO compilation
inferredcites →https://doi.org/10.1145/1815961.1816002openalex-snapshot
Web search using mobile cores
inferredcites →https://doi.org/10.1145/2000064.2000103openalex-snapshot
Power management of online data-intensive services
inferredcites →https://doi.org/10.1145/2150976.2150982openalex-snapshot
Clearing the clouds
inferredcites →https://doi.org/10.1145/2155620.2155650openalex-snapshot
Bubble-Up
inferredcites →https://doi.org/10.1145/2248487.2150982openalex-snapshot
Clearing the clouds
inferredcites →https://doi.org/10.1145/2366231.2337164openalex-snapshot
Towards energy-proportional datacenter memory with mobile DRAM
inferredcites →https://doi.org/10.1145/2366231.2337217openalex-snapshot
Scale-out processors
inferredcites →https://doi.org/10.1145/2408776.2408794openalex-snapshot
The tail at scale
inferredcites →https://doi.org/10.1145/2465351.2465388openalex-snapshot
CPI 2
inferredcites →https://doi.org/10.1145/2485922.2485975openalex-snapshot
Whare-map
inferredcites →https://doi.org/10.1145/2540708.2540725openalex-snapshot
RowClone
inferredcites →https://doi.org/10.1145/2540708.2540731openalex-snapshot
RDIP
inferredcites →https://doi.org/10.1145/2618128.2618131openalex-snapshot
Feedback directed optimization of TCMalloc
inferredcites →https://doi.org/10.1145/2628071.2628118openalex-snapshot
SQRL
inferredcites →https://doi.org/10.1145/2678373.2665678openalex-snapshot
A reconfigurable fabric for accelerating large-scale datacenter services
inferredcites →https://doi.org/10.1145/2741948.2741964openalex-snapshot
Large-scale cluster management at Google with Borg
inferredcites →https://doi.org/10.1145/945506.945509openalex-snapshot
Call graph prefetching for database applications
inferredcites →https://doi.org/10.14778/1920841.1920886openalex-snapshot
Dremel
inferredcites →https://doi.org/10.2200/s00193ed1v01y200905cac006openalex-snapshot
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines
inferredcites →https://doi.org/10.5555/1298455.1298475openalex-snapshot
Bigtable: a distributed storage system for structured data
inferredcites →https://doi.org/10.5555/2388996.2389066openalex-snapshot
Measuring interference between live datacenter applications
inferredcites →https://doi.org/10.56726/irjmets66464openalex-snapshot
Microservices Architecture

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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Post‐Moore Datacenter Server Architecture
inferred← citeshttps://doi.org/10.1002/smr.2467openalex-snapshot
Characterizing and synthesizing the workflow structure of microservices in ByteDance Cloud
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The Square-Root Rule for Scaling Memory Channels in Servers
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Interference-Aware Workload Placement for Improving Latency Distribution of Converged HPC/Big Data Cloud Infrastructures
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Root Causing MPI Workloads Imbalance Issues via Scalable MPI Critical Path Analysis
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Workload Characterization for Memory Management in Emerging Embedded Platforms
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HUSTLE: A Hardware Unit for Self-test-Libraries Efficient Execution
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Evaluation of Improvement Plans to Increase the Efficiency of Performance Data Collection/Transfer for Server Systems
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Towards Large-Scale Top-Down Microarchitecture Analysis Using the Score-P Framework
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A Twenty Five Year WSC Journey
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A Selection of 25 Top Papers for 25 Years of WSC
inferred← citeshttps://doi.org/10.1007/978-3-031-99489-0_3openalex-snapshot
Overview of WSC Workloads
inferred← citeshttps://doi.org/10.1007/978-3-031-99489-0_7openalex-snapshot
Software-Defined Infrastructure
inferred← citeshttps://doi.org/10.1007/978-3-031-99489-0_8openalex-snapshot
Performance and Costs
inferred← citeshttps://doi.org/10.1007/978-3-319-74521-3_62openalex-snapshot
When Partitioning Works and When It Doesn’t: An Empirical Study on Cache Way Partitioning
inferred← citeshttps://doi.org/10.1007/978-3-319-90385-9_5openalex-snapshot
The Processing-in-Memory Paradigm: Mechanisms to Enable Adoption
inferred← citeshttps://doi.org/10.1007/978-981-16-7487-7_7openalex-snapshot
A Modern Primer on Processing in Memory
inferred← citeshttps://doi.org/10.1007/978-981-95-1021-4_17openalex-snapshot
AsymServe: Demystifying and Optimizing LLM Serving Efficiency on CPU Acceleration Units
inferred← citeshttps://doi.org/10.1007/s00778-021-00663-8openalex-snapshot
Micro-architectural analysis of in-memory OLTP: Revisited
inferred← citeshttps://doi.org/10.1007/s10586-025-05596-3openalex-snapshot
ServerlessPGO: enhancing serverless cold starts through PGO
inferred← citeshttps://doi.org/10.1007/s10766-024-00771-2openalex-snapshot
Orchestration Extensions for Interference- and Heterogeneity-Aware Placement for Data-Analytics
inferred← citeshttps://doi.org/10.1007/s11265-025-01974-7openalex-snapshot
An Experimental Exploration of In-Memory Computing for Multi-Layer Perceptrons
inferred← citeshttps://doi.org/10.1007/s11432-022-3882-yopenalex-snapshot
Power synchronization: taming massive diversified serverless functions under power constraints
inferred← citeshttps://doi.org/10.1016/b978-0-12-812810-7.00011-xopenalex-snapshot
Cloud Hardware and Software
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Optical interconnection networks for high-performance systems
inferred← citeshttps://doi.org/10.1016/b978-0-323-91224-2.00003-5openalex-snapshot
Photonic switch fabrics in data center/high-performance computing networks
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Simulation of quantum many-body systems on Amazon cloud
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BDWatchdog: Real-time monitoring and profiling of Big Data applications and frameworks
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A survey on security applications with SmartNICs: Taxonomy, implementations, challenges, and future trends
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Intelligent colocation of HPC workloads
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Processing data where it makes sense: Enabling in-memory computation
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Data dependency reduction for high-performance FPGA implementation of DEFLATE compression algorithm
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TCADer: A Tightly Coupled Accelerator Design framework for heterogeneous system with hardware/software co-design
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Survey on memory management techniques in heterogeneous computing systems
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CryoCiM: Cryogenic compute-in-memory based on the quantum anomalous Hall effect
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Low-Overhead Compressibility Prediction for High-Performance Lossless Data Compression
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DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks
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Benchmarking a New Paradigm: Experimental Analysis and Characterization of a Real Processing-in-Memory System
inferred← citeshttps://doi.org/10.1109/access.2023.3317884openalex-snapshot
Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD
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CMOS-Based Single-Cycle in-Memory XOR/XNOR
inferred← citeshttps://doi.org/10.1109/access.2024.3437203openalex-snapshot
A Comprehensive Survey on SmartNICs: Architectures, Development Models, Applications, and Research Directions
inferred← citeshttps://doi.org/10.1109/access.2024.3513214openalex-snapshot
Optical Data Center Networking: A Comprehensive Review on Traffic, Switching, Bandwidth Allocation, and Challenges
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Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems
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Micro-Architectural Characterization of Apache Spark on Batch and Stream Processing Workloads
inferred← citeshttps://doi.org/10.1109/bigdata59044.2023.10386462openalex-snapshot
Accelerating Multilingual Applications with In-memory Array Sharing
inferred← citeshttps://doi.org/10.1109/ccgrid59990.2024.00063openalex-snapshot
CINDA: Don't Ignore Instructions When Cloning Memory Access Behavior
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iGen: A Realistic Request Generator for Cloud File Systems Benchmarking
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The Effect of Resource Allocation and System Events on VM Consolidation
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Efficient User-Level Storage Disaggregation for Deep Learning
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NeoMPX: Characterizing and Improving Estimation of Multiplexing Hardware Counters for PAPI
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JACO: JAva Code Layout Optimizer Enabling Continuous Optimization without Pausing Application Services
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Elastic and flexible multi-stage task scheduling with deadline-constraint in clouds
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Autonomous Warehouse-Scale Computers
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SmartDMA: Adaptable Memory Access Controller for CGRA-based Processing Systems
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Accelerating Data Serialization/Deserialization Protocols with In-Network Compute
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Shimmy: Accelerating Inter-Container Communication for the IoT Edge
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Improving Provisioned Power Efficiency in HPC Systems with GPU-CAPP
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Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM
inferred← citeshttps://doi.org/10.1109/hpca.2017.21openalex-snapshot
Compute Caches
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PABST: Proportionally Allocated Bandwidth at the Source and Target
inferred← citeshttps://doi.org/10.1109/hpca.2017.53openalex-snapshot
Boomerang: A Metadata-Free Architecture for Control Flow Delivery
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SmarCo: An Efficient Many-Core Processor for High-Throughput Applications in Datacenters
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Amdahl's Law in Big Data Analytics: Alive and Kicking in TPCx-BB (BigBench)
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Memory Hierarchy for Web Search
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Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores
inferred← citeshttps://doi.org/10.1109/hpca.2019.00032openalex-snapshot
μDPM: Dynamic Power Management for the Microsecond Era
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Kelp: QoS for Accelerated Machine Learning Systems
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Enhancing Server Efficiency in the Face of Killer Microseconds
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Featherlight Reuse-Distance Measurement
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Q-Zilla: A Scheduling Framework and Core Microarchitecture for Tail-Tolerant Microservices
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The Architectural Implications of Facebook's DNN-Based Personalized Recommendation
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Missing the Forest for the Trees: End-to-End AI Application Performance in Edge Data Centers
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Fulcrum: A Simplified Control and Access Mechanism Toward Flexible and Practical In-Situ Accelerators
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BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows
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QEI: Query Acceleration Can be Generic and Efficient in the Cloud
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PIMCloud: QoS-Aware Resource Management of Latency-Critical Applications in Clouds with Processing-in-Memory
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A Storage-Effective BTB Organization for Servers
inferred← citeshttps://doi.org/10.1109/hpca56546.2023.10071033openalex-snapshot
ACIC: Admission-Controlled Instruction Cache
inferred← citeshttps://doi.org/10.1109/hpca56546.2023.10071127openalex-snapshot
Rambda: RDMA-driven Acceleration Framework for Memory-intensive µs-scale Datacenter Applications
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SmartDIMM: In-Memory Acceleration of Upper Layer Protocols
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408462openalex-snapshot
SMTcheck: Accurate SMT Interference Prediction to Improve Scheduling Efficiency in Datacenters
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408539openalex-snapshot
AUM: Unleashing the Efficiency Potential of Shared Processors with Accelerator Units for LLM Serving
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408580openalex-snapshot
AccelFlow: Orchestrating an On-Package Ensemble of Fine-Grained Accelerators for Microservices
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Rigel: A Framework for OpenMP PerformanceTuning
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ESP: A Machine Learning Approach to Predicting Application Interference
inferred← citeshttps://doi.org/10.1109/icac.2019.00031openalex-snapshot
Express-Lane Scheduling and Multithreading to Minimize the Tail Latency of Microservices
inferred← citeshttps://doi.org/10.1109/iccd53106.2021.00059openalex-snapshot
HyperData: A Data Transfer Accelerator for Software Data Planes Based on Targeted Prefetching
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A Methodology and Testbed to Develop an Energy Model for 5G Virtualized RANs
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Towards Dataflow-Based Graph Accelerator
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CODA: Improving Resource Utilization by Slimming and Co-locating DNN and CPU Jobs
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On the applicability of simple cache models for modern processors
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Locpart: A Latency Optimized Cache Partitioning for Cloud Data Centers
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Demystifying Datapath Accelerator Enhanced Off-path SmartNIC
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Static Analysis of Remote Procedure Call in Java Programs
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Benchmarking Memory-Centric Computing Systems: Analysis of Real Processing-In-Memory Hardware
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Pbench: a benchmark suite for characterizing 3D printing prefabrication
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MeNa: A memory navigator for modern hardware in a scale-out environment
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Pocolo: Power Optimized Colocation in Power Constrained Environments
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CPI for Runtime Performance Measurement: The Good, the Bad, and the Ugly
inferred← citeshttps://doi.org/10.1109/iiswc50251.2020.00024openalex-snapshot
Cross-Stack Workload Characterization of Deep Recommendation Systems
inferred← citeshttps://doi.org/10.1109/iiswc59245.2023.00025openalex-snapshot
Making Sense of Using a SmartNIC to Reduce Datacenter Tax from SLO and TCO Perspectives
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FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud
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A Case for Richer Cross-Layer Abstractions: Bridging the Semantic Gap with Expressive Memory
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Scaling Datacenter Accelerators with Compute-Reuse Architectures
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Divide and Conquer Frontend Bottleneck
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CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off
inferred← citeshttps://doi.org/10.1109/isca52012.2021.00016openalex-snapshot
Exploiting Page Table Locality for Agile TLB Prefetching
inferred← citeshttps://doi.org/10.1109/isca52012.2021.00017openalex-snapshot
A Cost-Effective Entangling Prefetcher for Instructions
inferred← citeshttps://doi.org/10.1109/isca52012.2021.00063openalex-snapshot
Ripple: Profile-Guided Instruction Cache Replacement for Data Center Applications
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AVM-BTB: Adaptive and Virtualized Multi-level Branch Target Buffer
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Counter-light Memory Encryption
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Intel Accelerators Ecosystem: An SoC-Oriented Perspective : Industry Product
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(MC)2: Lazy MemCopy at the Memory Controller
inferred← citeshttps://doi.org/10.1109/isca59077.2024.00092openalex-snapshot
Alternate Path μ-op Cache Prefetching
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PhaseWeave: Phase-Aware Execution on Heterogeneous Chiplet Architectures for Datacenters
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Bumper: Hinting Instruction Usefulness for Robust Unified Caches
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Enhancing Instruction Prefetching via Cache and TLB Management
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YARB: a Methodology to Characterize Regular Expression Matching on Heterogeneous Systems
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A Latency-Predictable Cloud-Native Network Architecture based on XDP
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The Alberta Workloads for the SPEC CPU 2017 Benchmark Suite
inferred← citeshttps://doi.org/10.1109/ispass.2019.00012openalex-snapshot
One Size Does Not Fit All: Quantifying and Exposing the Accuracy-Latency Trade-Off in Machine Learning Cloud Service APIs via Tolerance Tiers
inferred← citeshttps://doi.org/10.1109/ispass.2019.00031openalex-snapshot
Demystifying Bayesian Inference Workloads
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Performance Characterization of Simultaneous Multi-Threading and Index Partitioning for an Online Document Search Application
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Profiling an Architectural Simulator
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A Characterization of the Effects of Software Instruction Prefetching on an Aggressive Front-end
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Profiling gem5 Simulator
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Analyzing Energy Efficiency of a Server with a SmartNIC under SLO Constraints
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A Profiling-Based Benchmark Suite for Warehouse-Scale Computers
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Intel ® in-Memory Analytics Accelerator: Performance Characterization and Guidelines
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Evaluation of MindPalace for Chip Design Tradeoffs on Function-as-a-Service
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Multi-Level TDA for Heterogeneous Arm Processors Using a Standardized Telemetry Framework
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UltraLiM: In-Memory Boolean Logic Architecture Using UltraRAM
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Measuring the Impact of Memory Errors on Application Performance
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The Architectural Implications of Cloud Microservices
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Code Layout Optimization for Near-Ideal Instruction Cache
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Old is Gold: Optimizing Single-Threaded Applications With ExGen-Malloc
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Untangling the Low Accuracy of the Entangling Instruction Prefetcher
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Characterizing System-Level Trade-Offs of Intel DSA for User-Space IPC Offloading
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A unified memory network architecture for in-memory computing in commodity servers
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Rethinking the Memory Hierarchy for Modern Languages
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Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration
inferred← citeshttps://doi.org/10.1109/micro.2018.00052openalex-snapshot
Farewell My Shared LLC! A Case for Private Die-Stacked DRAM Caches for Servers
inferred← citeshttps://doi.org/10.1109/micro.2018.00056openalex-snapshot
CounterMiner: Mining Big Performance Data from Hardware Counters
inferred← citeshttps://doi.org/10.1109/micro.2018.00083openalex-snapshot
DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00023openalex-snapshot
CHiRP: Control-Flow History Reuse Prediction
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00024openalex-snapshot
I-SPY: Context-Driven Conditional Instruction Prefetching with Coalescing
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00017openalex-snapshot
Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00067openalex-snapshot
pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00070openalex-snapshot
Page Size Aware Cache Prefetching
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00082openalex-snapshot
Datamime: Generating Representative Benchmarks by Automatically Synthesizing Datasets
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00042openalex-snapshot
The Last-Level Branch Predictor
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00102openalex-snapshot
Weeding out Front-End Stalls with Uneven Block Size Instruction Cache
inferred← citeshttps://doi.org/10.1109/mm.2016.38openalex-snapshot
Profiling a Warehouse-Scale Computer
inferred← citeshttps://doi.org/10.1109/mm.2019.2897671openalex-snapshot
The Queuing-First Approach for Tail Management of Interactive Services
inferred← citeshttps://doi.org/10.1109/mm.2020.2986212openalex-snapshot
AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers
inferred← citeshttps://doi.org/10.1109/mm.2021.3066615openalex-snapshot
Understanding Acceleration Opportunities at Hyperscale
inferred← citeshttps://doi.org/10.1109/mm.2023.3260186openalex-snapshot
The AMD 400-G Adaptive SmartNIC System on Chip: A Technology Preview
inferred← citeshttps://doi.org/10.1109/mm.2023.3274758openalex-snapshot
Online Code Layout Optimizations via OCOLOS
inferred← citeshttps://doi.org/10.1109/mm.2024.3409469openalex-snapshot
Twenty Five Years of Warehouse-Scale Computing
inferred← citeshttps://doi.org/10.1109/mm.2024.3413649openalex-snapshot
Tales of the Tail: Past and Future
inferred← citeshttps://doi.org/10.1109/mm.2025.3593408openalex-snapshot
MangoBoost Alice: Extremely Fast, Seamless, and Versatile FPGA-Accelerated DPU Solutions
inferred← citeshttps://doi.org/10.1109/nas63802.2024.10781344openalex-snapshot
Hardware and Software Co-Design of FPGA-based Erasure Coding Accelerator for Enterprise Storage
inferred← citeshttps://doi.org/10.1109/nas63802.2024.10781372openalex-snapshot
SAQO: Empowering Computational Storage Device for Efficient SQL Query Acceleration
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mLOOP: Optimize Loop Unrolling in Compilation with a ML-based Approach
inferred← citeshttps://doi.org/10.1109/netsoft.2019.8806698openalex-snapshot
NetML: An NFV Platform with Efficient Support for Machine Learning Applications
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Distributed Software Switching for Scalable Network Functions
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Nexus: A New Approach to Replication in Distributed Shared Caches
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CoPlace: Effectively Mitigating Cache Conflicts in Modern Clouds
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CHAMPVis: Comparative Hierarchical Analysis of Microarchitectural Performance
inferred← citeshttps://doi.org/10.1109/qsw67625.2025.00039openalex-snapshot
Slackness-Driven Microservice Deployment Across Geo-Distributed Clouds: Workflow-Aware Scheduling for End-to-End QoS Assurance
inferred← citeshttps://doi.org/10.1109/sbac-pad.2016.21openalex-snapshot
Empirical, Analytical Study of Hardware-Based Page Swap in Hybrid Main Memory System
inferred← citeshttps://doi.org/10.1109/sbac-pad.2019.00030openalex-snapshot
Intelligent Colocation of Workloads for Enhanced Server Efficiency
inferred← citeshttps://doi.org/10.1109/sc.2016.33openalex-snapshot
Reliable and Efficient Performance Monitoring in Linux
inferred← citeshttps://doi.org/10.1109/scw63240.2024.00126openalex-snapshot
Protocol Buffer Deserialization DPU Offloading in the RPC Datapath
inferred← citeshttps://doi.org/10.1109/sips.2016.36openalex-snapshot
An Efficient Hardware Architecture for Lossless Data Compression in Data Center
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Dynamic job scheduling on scalable cloud resources
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MANA: Microarchitecting a Temporal Instruction Prefetcher
inferred← citeshttps://doi.org/10.1109/tc.2025.3625160openalex-snapshot
NBBM: An Efficient SmartNIC-Based Architecture for Bare-Metal Management in Cloud Platforms
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Linked Data Processing for Human-in-the-Loop in Cyber–Physical Systems
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On the Performance Intricacies of Persistent Memory Aware Storage Engines
inferred← citeshttps://doi.org/10.1109/tnet.2024.3366561openalex-snapshot
SPRIGHT: High-Performance eBPF-Based Event-Driven, Shared-Memory Processing for Serverless Computing
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Understanding Big Data Analytics Workloads on Modern Processors
inferred← citeshttps://doi.org/10.1109/tpds.2017.2766151openalex-snapshot
Quantifying the Impact of Variability and Heterogeneity on the Energy Efficiency for a Next-Generation Ultra-Green Supercomputer
inferred← citeshttps://doi.org/10.1109/tpds.2018.2793254openalex-snapshot
Scheduling Stochastic Multi-Stage Jobs to Elastic Hybrid Cloud Resources
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Hierarchical Hybrid Memory Management in OS for Tiered Memory Systems
inferred← citeshttps://doi.org/10.1109/tpds.2020.3013948openalex-snapshot
Rusty: Runtime Interference-Aware Predictive Monitoring for Modern Multi-Tenant Systems
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Compositional Coordinated Resource Provisioning in Workflows With Stochastic Durations
inferred← citeshttps://doi.org/10.1109/tse.2017.2775634openalex-snapshot
Automatically Exploring Tradeoffs Between Software Output Fidelity and Energy Costs
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Reducing Datacenter Compute Carbon Footprint by Harnessing the Power of Specialization: Principles, Metrics, Challenges and Opportunities
inferred← citeshttps://doi.org/10.1117/12.2628723openalex-snapshot
Programmable NIC-based task offload framework
inferred← citeshttps://doi.org/10.1145/2818950.2818973openalex-snapshot
Rethinking Design Metrics for Datacenter DRAM
inferred← citeshttps://doi.org/10.1145/2830772.2830785openalex-snapshot
Confluence
inferred← citeshttps://doi.org/10.1145/2830772.2830792openalex-snapshot
Microarchitectural implications of event-driven server-side web applications
inferred← citeshttps://doi.org/10.1145/2851141.2851151openalex-snapshot
Work stealing for interactive services to meet target latency
inferred← citeshttps://doi.org/10.1145/2854038.2854044openalex-snapshot
AutoFDO: automatic feedback-directed optimization for warehouse-scale applications
inferred← citeshttps://doi.org/10.1145/2896377.2901453openalex-snapshot
Understanding Latency Variation in Modern DRAM Chips
inferred← citeshttps://doi.org/10.1145/2897937.2897986openalex-snapshot
An MPSoC for energy-efficient database query processing
inferred← citeshttps://doi.org/10.1145/2901318.2901337openalex-snapshot
Flash storage disaggregation
inferred← citeshttps://doi.org/10.1145/2925426.2926293openalex-snapshot
Simulation and Analysis Engine for Scale-Out Workloads
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