On the public citation graph

EOLE

https://doi.org/10.1145/2870632
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/hpca.1999.744311openalex-snapshot
Global context-based value prediction
inferredcites →https://doi.org/10.1109/hpca.2001.903264openalex-snapshot
Differential FCM: increasing value prediction accuracy by improving table usage efficiency
inferredcites →https://doi.org/10.1109/hpca.2004.10011openalex-snapshot
Understanding Scheduling Replay Schemes
inferredcites →https://doi.org/10.1109/hpca.2011.5749750openalex-snapshot
Storage free confidence estimation for the TAGE branch predictor
inferredcites →https://doi.org/10.1109/hpca.2014.6835952openalex-snapshot
Practical data value speculation for future high-end processors
inferredcites →https://doi.org/10.1109/hpca.2015.7056018openalex-snapshot
BeBoP: A cost effective predictor infrastructure for superscalar value prediction
inferredcites →https://doi.org/10.1109/iccd.1998.727028openalex-snapshot
The Alpha 21264 microprocessor architecture
inferredcites →https://doi.org/10.1109/iccd.2005.2openalex-snapshot
Proceedings. 2005 International Conference on Computer Design
inferredcites →https://doi.org/10.1109/isca.1994.288167openalex-snapshot
Proceedings of 21 International Symposium on Computer Architecture
inferredcites →https://doi.org/10.1109/isca.2005.19openalex-snapshot
Continuous optimization
inferredcites →https://doi.org/10.1109/isca.2005.43openalex-snapshot
RENO: a rename-based instruction optimizer
inferredcites →https://doi.org/10.1109/isca.2008.23openalex-snapshot
Achieving Out-of-Order Performance with Almost In-Order Complexity
inferredcites →https://doi.org/10.1109/micro.2012.37openalex-snapshot
Composite Cores: Pushing Heterogeneity Into a Core
inferredcites →https://doi.org/10.1109/pact.1996.552666openalex-snapshot
A scalable register file architecture for dynamically scheduled processors
inferredcites →https://doi.org/10.1145/1080695.1069967openalex-snapshot
Continuous Optimization
inferredcites →https://doi.org/10.1145/1080695.1069980openalex-snapshot
RENO
inferredcites →https://doi.org/10.1145/1394608.1382169openalex-snapshot
Achieving Out-of-Order Performance with Almost In-Order Complexity
inferredcites →https://doi.org/10.1145/2024716.2024718openalex-snapshot
The gem5 simulator
inferredcites →https://doi.org/10.1145/237090.237173openalex-snapshot
Value locality and load value prediction
inferredcites →https://doi.org/10.1145/264107.264201openalex-snapshot
Complexity-effective superscalar processors
inferredcites →https://doi.org/10.1145/2678373.2665742openalex-snapshot
EOLE
inferredcites →https://doi.org/10.1145/2749469.2749470openalex-snapshot
Cost-effective speculative scheduling in high performance processors
inferredcites →https://doi.org/10.1145/279358.279378openalex-snapshot
Memory dependence prediction using store sets
inferredcites →https://doi.org/10.1145/280756.280943openalex-snapshot
The energy complexity of register files
inferredcites →https://doi.org/10.1145/290409.290411openalex-snapshot
Using value prediction to increase the power of speculative execution hardware
inferredcites →https://doi.org/10.1145/3656019openalex-snapshot
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques
inferredcites →https://doi.org/10.1145/379240.379253openalex-snapshot
Focusing processor policies via critical-path prediction
inferredcites →https://doi.org/10.1145/545214.545221openalex-snapshot
Efficient dynamic scheduling through tag elimination
inferredcites →https://doi.org/10.1145/859618.859623openalex-snapshot
Half-price architecture
inferredcites →https://doi.org/10.1145/859618.859656openalex-snapshot
Detecting global stride locality in value streams
inferredcites →https://doi.org/10.1147/rd.374.0547openalex-snapshot
A load-instruction unit for pipelined processors
inferredcites →https://doi.org/10.5555/225160.225170openalex-snapshot
The performance impact of incomplete bypassing in processor pipelines
inferredcites →https://doi.org/10.5555/266800.266824openalex-snapshot
The predictability of data values
inferredcites →https://doi.org/10.5555/266800.266827openalex-snapshot
Highly accurate data value prediction using hybrid predictors
inferredcites →https://doi.org/10.5555/645989.674310openalex-snapshot
Quantifying instruction criticality
inferredcites →https://doi.org/10.5555/774861.774902openalex-snapshot
Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors
inferredcites →https://doi.org/10.5555/942806.943854openalex-snapshot
Picking statistically valid and early simulation points

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/bs.adcom.2021.09.004openalex-snapshot
Approximate communication for energy-efficient network-on-chip
inferred← citeshttps://doi.org/10.1109/eurosp57164.2023.00044openalex-snapshot
SoK: Analysis of Root Causes and Defense Strategies for Attacks on Microarchitectural Optimizations
inferred← citeshttps://doi.org/10.1109/iccd.2017.31openalex-snapshot
ABDTR: Approximation-Based Dynamic Traffic Regulation for Networks-on-Chip Systems
inferred← citeshttps://doi.org/10.1109/isca52012.2021.00035openalex-snapshot
Opening Pandora’s Box: A Systematic Study of New Ways Microarchitecture Can Leak Private Data
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00045openalex-snapshot
Helium: Quantifying Microarchitectural Side-Channel Leakage with Probabilistic Guarantees
inferred← citeshttps://doi.org/10.1109/tc.2018.2879434openalex-snapshot
SparCE: Sparsity Aware General-Purpose Core Extensions to Accelerate Deep Neural Networks
inferred← citeshttps://doi.org/10.1109/tc.2020.3014456openalex-snapshot
Understanding Selective Delay as a Method for Efficient Secure Speculative Execution
inferred← citeshttps://doi.org/10.1109/tcad.2025.3526544openalex-snapshot
Nested Speculative Execution Attacks via Runahead
inferred← citeshttps://doi.org/10.1145/3090634openalex-snapshot
On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE
inferred← citeshttps://doi.org/10.3389/fonc.2022.884523openalex-snapshot
Respiratory Prediction Based on Multi-Scale Temporal Convolutional Network for Tracking Thoracic Tumor Movement
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