On the public citation graph
GPU Performance vs. Thread-Level Parallelism
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/hotchips.2012.7476485openalex-snapshot
AMD Radeon™ HD 7970 with graphics core next (GCN) architecture
inferredcites →https://doi.org/10.1109/hpca.2012.6168946openalex-snapshot
The case for GPGPU spatial multitasking
inferredcites →https://doi.org/10.1109/hpca.2014.6835937openalex-snapshot
Improving GPGPU resource utilization through alternative thread block scheduling
inferredcites →https://doi.org/10.1109/hpca.2014.6835939openalex-snapshot
Warp-level divergence in GPUs: Characterization, impact, and mitigation
inferredcites →https://doi.org/10.1109/hpca.2015.7056024openalex-snapshot
Priority-based cache allocation in throughput processors
inferredcites →https://doi.org/10.1109/hpca.2015.7056031openalex-snapshot
Mascar: Speeding up GPU warps by reducing memory pitstops
inferredcites →https://doi.org/10.1109/hpca.2016.7446078openalex-snapshot
Simultaneous Multikernel GPU: Multi-tasking throughput processors via fine-grained sharing
inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot
Rodinia: A benchmark suite for heterogeneous computing
inferredcites →https://doi.org/10.1109/iiswc.2015.22openalex-snapshot
A Taxonomy of GPGPU Performance Scaling
inferredcites →https://doi.org/10.1109/iiswc.2016.7581287openalex-snapshot
Characterizing memory bottlenecks in GPGPU workloads
inferredcites →https://doi.org/10.1109/inpar.2012.6339595openalex-snapshot
Auto-tuning a high-level language targeted to GPU codes
inferredcites →https://doi.org/10.1109/isca.2016.29openalex-snapshot
Warped-Slicer: Efficient Intra-SM Slicing through Dynamic Resource Partitioning for GPU Multiprogramming
inferredcites →https://doi.org/10.1109/isca.2016.59openalex-snapshot
Virtual Thread: Maximizing Thread-Level Parallelism beyond GPU Scheduling Limit
inferredcites →https://doi.org/10.1109/ispass.2010.5452013openalex-snapshot
Demystifying GPU microarchitecture through microbenchmarking
inferredcites →https://doi.org/10.1109/micro.2012.16openalex-snapshot
Cache-Conscious Wavefront Scheduling
inferredcites →https://doi.org/10.1109/micro.2012.18openalex-snapshot
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor
inferredcites →https://doi.org/10.1109/pact20333.2013openalex-snapshot
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques
inferredcites →https://doi.org/10.1109/tcom.1987.1096719openalex-snapshot
Input Versus Output Queueing on a Space-Division Packet Switch
inferredcites →https://doi.org/10.1109/tpds.2016.2549523openalex-snapshot
Dissecting GPU Memory Hierarchy Through Microbenchmarking
inferredcites →https://doi.org/10.1145/2451116.2451160openalex-snapshot
Improving GPGPU concurrency with elastic kernels
inferredcites →https://doi.org/10.1145/2925426.2926267openalex-snapshot
Barrier-Aware Warp Scheduling for Throughput Processors
inferredcites →https://doi.org/10.5555/2342788.2342798openalex-snapshot
Fine-grained resource sharing for concurrent GPGPU kernels
inferredcites →https://doi.org/10.5555/2523721.2523745openalex-snapshot
Neither more nor less: optimizing thread-level parallelism for GPGPUs
inferredcites →https://doi.org/10.5555/3014904.3015007openalex-snapshot
Enabling efficient preemption for SIMT architectures with lightweight context switching
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s00607-023-01255-wopenalex-snapshot
Many-BSP: an analytical performance model for CUDA kernels
inferred← citeshttps://doi.org/10.1109/dac63849.2025.11132550openalex-snapshot
ACRS: Adjacent Computation Resource Sharing among Partitioned GPU Sub-Cores
inferred← citeshttps://doi.org/10.1109/icisfall51598.2021.9627400openalex-snapshot
A Survey of GPGPU Parallel Processing Architecture Performance Optimization
inferred← citeshttps://doi.org/10.1109/icpics55264.2022.9873685openalex-snapshot
POTDP: Research GPU Performance Optimization Method based on Thread Dynamic Programming
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00087openalex-snapshot
Independent Forward Progress of Work-groups
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00111openalex-snapshot
sCROOGe: Circuit-level Design and Optimization Framework for RISC-V Out-of-Order GPUs
inferred← citeshttps://doi.org/10.1145/3280849openalex-snapshot
Improving Thread-level Parallelism in GPUs Through Expanding Register File to Scratchpad Memory
inferred← citeshttps://doi.org/10.1145/3326124openalex-snapshot
Coordinated CTA Combination and Bandwidth Partitioning for GPU Concurrent Kernel Execution
inferred← citeshttps://doi.org/10.1145/3377138openalex-snapshot
A Model-Based Software Solution for Simultaneous Multiple Kernels on GPUs
inferred← citeshttps://doi.org/10.1177/10943420251348799openalex-snapshot
Technology trends in computing hardware and their impacts on high-performance scientific computing Part I: General-purpose processors and hardware accelerators
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