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Deciding reachability under persistent x86-TSO

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-642-28869-2_2openalex-snapshot
What’s Decidable about Weak Memory Models?
inferredcites →https://doi.org/10.1007/978-3-642-31424-7_36openalex-snapshot
An Axiomatic Memory Model for POWER Multiprocessors
inferredcites →https://doi.org/10.1007/978-3-642-37036-6_28openalex-snapshot
Software Verification for Weak Memory via Program Transformation
inferredcites →https://doi.org/10.1007/978-3-642-39799-8_9openalex-snapshot
Partial Orders for Efficient Bounded Model Checking of Concurrent Software
inferredcites →https://doi.org/10.1007/978-3-642-54848-2_2openalex-snapshot
Context-Bounded Analysis of TSO Systems
inferredcites →https://doi.org/10.1007/978-3-662-54580-5_4openalex-snapshot
Context-Bounded Analysis for POWER
inferredcites →https://doi.org/10.1007/s00236-016-0275-0openalex-snapshot
Stateless model checking for TSO and PSO
inferredcites →https://doi.org/10.1016/s0304-3975(00)00102-xopenalex-snapshot
Well-structured transition systems everywhere!
inferredcites →https://doi.org/10.1109/lics.1993.287591openalex-snapshot
Verifying programs with unreliable channels
inferredcites →https://doi.org/10.1109/lics.1996.561359openalex-snapshot
General decidability theorems for infinite-state systems
inferredcites →https://doi.org/10.1145/1706299.1706303openalex-snapshot
On the verification problem for weak memory models
inferredcites →https://doi.org/10.1145/1925844.1926394openalex-snapshot
Mathematizing C++ concurrency
inferredcites →https://doi.org/10.1145/1926385.1926394openalex-snapshot
Mathematizing C++ concurrency
inferredcites →https://doi.org/10.1145/2627752openalex-snapshot
Herding Cats
inferredcites →https://doi.org/10.1145/2678373.2665712openalex-snapshot
Memory persistency
inferredcites →https://doi.org/10.1145/2814270.2814297openalex-snapshot
SATCheck: SAT-directed stateless model checking for SC and TSO
inferredcites →https://doi.org/10.1145/2837614.2837615openalex-snapshot
Modelling the ARMv8 architecture, operationally: concurrency and ISA
inferredcites →https://doi.org/10.1145/2837614.2837625openalex-snapshot
'Cause I'm strong enough: Reasoning about consistency choices in distributed systems
inferredcites →https://doi.org/10.1145/2837614.2837643openalex-snapshot
Taming release-acquire consistency
inferredcites →https://doi.org/10.1145/2858965.2814297openalex-snapshot
SATCheck: SAT-directed stateless model checking for SC and TSO
inferredcites →https://doi.org/10.1145/2983990.2983997openalex-snapshot
An operational semantics for C/C++11 concurrency
inferredcites →https://doi.org/10.1145/3009837.3009850openalex-snapshot
A promising semantics for relaxed-memory concurrency
inferredcites →https://doi.org/10.1145/3022671.2983997openalex-snapshot
An operational semantics for C/C++11 concurrency
inferredcites →https://doi.org/10.1145/3035918.3054780openalex-snapshot
How to Build a Non-Volatile Memory Database Management System
inferredcites →https://doi.org/10.1145/3158105openalex-snapshot
Effective stateless model checking for C/C++ concurrency
inferredcites →https://doi.org/10.1145/3276505openalex-snapshot
Optimal stateless model checking under the release-acquire semantics
inferredcites →https://doi.org/10.1145/3276507openalex-snapshot
Persistence semantics for weak memory: integrating epoch persistency with the TSO memory model
inferredcites →https://doi.org/10.1145/3276523openalex-snapshot
Object-oriented recovery for non-volatile memory
inferredcites →https://doi.org/10.1145/3290382openalex-snapshot
Bridging the gap between programming languages and hardware weak memory models
inferredcites →https://doi.org/10.1145/3297858.3304015openalex-snapshot
PMTest
inferredcites →https://doi.org/10.1145/3314221.3314649openalex-snapshot
Verification of programs under the release-acquire semantics
inferredcites →https://doi.org/10.1145/3360561openalex-snapshot
Weak persistency semantics from the ground up: formalising the persistency semantics of ARMv8 and transactional models
inferredcites →https://doi.org/10.1145/3360599openalex-snapshot
Effective lock handling in stateless model checking
inferredcites →https://doi.org/10.1145/3371079openalex-snapshot
Persistency semantics of the Intel-x86 architecture
inferredcites →https://doi.org/10.1145/3373376.3378452openalex-snapshot
Cross-Failure Bug Detection in Persistent Memory Programs
inferredcites →https://doi.org/10.1145/3373376.3378480openalex-snapshot
HMC
inferredcites →https://doi.org/10.1145/3385412.3385966openalex-snapshot
Decidable verification under a causally consistent shared memory
inferredcites →https://doi.org/10.1145/3434328openalex-snapshot
Taming x86-TSO persistency
inferredcites →https://doi.org/10.1561/2500000011openalex-snapshot
Principles of Eventual Consistency
inferredcites →https://doi.org/10.23638/lmcs-14(1:9)2018openalex-snapshot
A Load-Buffer Semantics for Total Store Ordering

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-99336-8_9openalex-snapshot
View-Based Owicki–Gries Reasoning for Persistent x86-TSO
inferred← citeshttps://doi.org/10.1007/978-3-031-22337-2_24openalex-snapshot
Consistency and Persistency in Program Verification: Challenges and Opportunities
inferred← citeshttps://doi.org/10.1007/978-3-031-37706-8_11openalex-snapshot
Rely-Guarantee Reasoning for Causally Consistent Shared Memory
inferred← citeshttps://doi.org/10.1007/978-3-032-32519-8_6openalex-snapshot
On the Verification Problem of Remote Direct Memory Access Programs
inferred← citeshttps://doi.org/10.1007/s10703-024-00462-1openalex-snapshot
A verified durable transactional mutex lock for persistent x86-TSO
inferred← citeshttps://doi.org/10.1145/3434328openalex-snapshot
Taming x86-TSO persistency
inferred← citeshttps://doi.org/10.1145/3498683openalex-snapshot
Extending Intel-x86 consistency and persistency: formalising the semantics of Intel-x86 memory types and non-temporal stores
inferred← citeshttps://doi.org/10.1145/3519270.3538445openalex-snapshot
Parameterized Verification under Release Acquire is PSPACE-complete
inferred← citeshttps://doi.org/10.1145/3656425openalex-snapshot
Verification under Intel-x86 with Persistency
inferred← citeshttps://doi.org/10.1145/3669940.3707269openalex-snapshot
Robustness Verification for Checking Crash Consistency of Non-volatile Memory
inferred← citeshttps://doi.org/10.1145/3689781openalex-snapshot
Semantics of Remote Direct Memory Access: Operational and Declarative Models of RDMA on TSO Architectures
inferred← citeshttps://doi.org/10.1145/3776680openalex-snapshot
Parametrised Verification of Intel-x86 Programs
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